f16c.h

// SPDX-FileCopyrightText: 2026 Edward Kmett <ekmett@gmail.com>
// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
#pragma once
#include "native/config.h"
#include "native/attributes.h"
#include "native/isa.h"
#include <concepts>
#include <cstdint>
#if NATIVE_HOST_X86
#include <immintrin.h>
#endif
 
#if NATIVE_HOST_X86 || defined(NATIVE_DOXYGEN)
namespace native::detail::x86_f16c {
// Internal register helpers for the native.x86.f16c module.
 

  template<isa<x86> Arch, unsigned Imm8, class V>
    requires(Arch.has(x86_feature::f16c) && Imm8 <= 255 && std::same_as<V, __m128>)
  native_nodiscard native_inline native_target("f16c")
  __m128i cvtps_ph(V a) noexcept {
    __m128i result;
    // LLVM's conversion intrinsics can disappear when their output is unused.
    // Volatile asm retains the instruction; the memory clobber orders it with
    // MXCSR loads/stores. Dialect alternatives support both assembler syntaxes.
    __asm__ volatile("vcvtps2ph {%2, %1, %0|%0, %1, %2}"
      : "=x"(result) : "x"(a), "i"(Imm8) : "memory");
    return result;
  }

  template<isa<x86> Arch, unsigned Imm8, class V>
    requires(Arch.has(x86_feature::f16c) && Imm8 <= 255 && std::same_as<V, __m256>)
  native_nodiscard native_inline native_target("f16c")
  __m128i cvtps_ph(V a) noexcept {
    __m128i result;
    __asm__ volatile("vcvtps2ph {%2, %1, %0|%0, %1, %2}"
      : "=x"(result) : "x"(a), "i"(Imm8) : "memory");
    return result;
  }

  template<isa<x86> Arch, unsigned Lanes, class V>
    requires(Arch.has(x86_feature::f16c) && Lanes == 4 && std::same_as<V, __m128i>)
  native_nodiscard native_inline native_target("f16c")
  __m128 cvtph_ps(V a) noexcept {
    __m128 result;
    __asm__ volatile("vcvtph2ps {%1, %0|%0, %1}"
      : "=x"(result) : "x"(a) : "memory");
    return result;
  }

  template<isa<x86> Arch, unsigned Lanes, class V>
    requires(Arch.has(x86_feature::f16c) && Lanes == 8 && std::same_as<V, __m128i>)
  native_nodiscard native_inline native_target("f16c")
  __m256 cvtph_ps(V a) noexcept {
    __m256 result;
    __asm__ volatile("vcvtph2ps {%1, %0|%0, %1}"
      : "=x"(result) : "x"(a) : "memory");
    return result;
  }

  template<isa<x86> Arch, unsigned Imm8>
    requires(Arch.has(x86_feature::f16c) && Imm8 <= 255)
  native_nodiscard native_inline native_target("f16c")
  std::uint16_t cvtss_sh(float a) noexcept {
    return static_cast<std::uint16_t>(_mm_cvtsi128_si32(cvtps_ph<Arch, Imm8>(_mm_set_ss(a))));
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::f16c))
  native_nodiscard native_inline native_target("f16c")
  float cvtsh_ss(std::uint16_t a) noexcept {
    return _mm_cvtss_f32(cvtph_ps<Arch, 4>(_mm_cvtsi32_si128(a)));
  }
 
}
#endif