x86 instruction sets

Instruction sets

The extensions below have independent feature requirements. An AVX profile does not imply every scalar bit operation or cryptographic extension. Use the ISA guide to construct requirements and target selection to admit the containing function.

• ADX: unsigned addition with carry
• AES: AES-NI rounds and key helpers
• AVX-512BITALG: byte counts and bit selection
• AVX-512CD: conflict detection and leading-zero counts
• AVX-512VBMI: byte permutations and bit windows
• AVX-512VBMI2: compaction and double-source shifts
• AVX-512VPOPCNTDQ: packed population counts
• AVX-IFMA/AVX-512IFMA: 52-bit multiply-add
• AVX-NE-CONVERT: FP16 and BF16 data conversion
• AVX-VNNI/AVX-512VNNI: integer dot products
• AVX2/AVX-512: gather and scatter
• BMI1: bit extraction and lowest-bit operations
• BMI2: bit packing and wide products
• CRC32C: Castagnoli checksum updates
• F16C: IEEE half-precision conversions
• GFNI: finite-field byte arithmetic
• LZCNT: leading-zero counts
• PCLMULQDQ/VPCLMULQDQ: carry-less polynomial products
• POPCNT: scalar population counts
• SHA: SHA-1 and SHA-256 rounds
• SHA512/SM3/SM4: hash and cipher rounds
• VAES: parallel AES rounds
• WAITPKG/MWAITX: waiting and spin loops