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native 0.0.1
Vectors, masks and wide register packs for C++26
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Functions | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::aes)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::aese (simd< std::uint8_t, 16, Arch > state, simd< std::uint8_t, 16, Arch > round_key) noexcept |
| Apply AddRoundKey, SubBytes and ShiftRows to one AES state. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::aes)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::aesd (simd< std::uint8_t, 16, Arch > state, simd< std::uint8_t, 16, Arch > round_key) noexcept |
| Apply AddRoundKey, inverse ShiftRows and inverse SubBytes to one AES state. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::aes)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::aesmc (simd< std::uint8_t, 16, Arch > state) noexcept |
| Apply AES MixColumns independently to the four state columns. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::aes)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::aesimc (simd< std::uint8_t, 16, Arch > state) noexcept |
| Apply inverse AES MixColumns independently to the four state columns. | |
| template<isa< arm > Arch, class... T> | |
| void | native::aese (T...)=delete |
| Reject unsupported argument shapes or unavailable instruction features. | |
| template<isa< arm > Arch, class... T> | |
| void | native::aesd (T...)=delete |
| Reject unsupported argument shapes or unavailable instruction features. | |
| template<isa< arm > Arch, class... T> | |
| void | native::aesmc (T...)=delete |
| Reject unsupported argument shapes or unavailable instruction features. | |
| template<isa< arm > Arch, class... T> | |
| void | native::aesimc (T...)=delete |
| Reject unsupported argument shapes or unavailable instruction features. | |
Single-round AES transformations on a 16-byte state; no key expansion, padding or cipher mode is performed. Bytes use the ACLE state ordering. Arch requires FEAT_AES. The compiler target "aes" also enables PMULL; admit the complete target_features<arm>("aes") set before entering that leaf. These integer operations do not read or modify FPCR, FPSR or NZCV. Constant evaluation computes the same integer values. Feature-absent calls are immediate-only and still require complete SIMD storage for their Arch.