SM3

Collaboration diagram for SM3:

Functions
template<isa< arm > Arch> requires (Arch.has(arm_feature::sm3))
constexpr simd< std::uint32_t, 4, Arch >	native::sm3ss1 (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
	Rotate and add the lane-three inputs; return SS1 in lane three and zero elsewhere.
template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)
constexpr simd< std::uint32_t, 4, Arch >	native::sm3tt1a (simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words) noexcept
template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)
constexpr simd< std::uint32_t, 4, Arch >	native::sm3tt1b (simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words) noexcept
template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)
constexpr simd< std::uint32_t, 4, Arch >	native::sm3tt2a (simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words) noexcept
template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)
constexpr simd< std::uint32_t, 4, Arch >	native::sm3tt2b (simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words) noexcept
template<isa< arm > Arch> requires (Arch.has(arm_feature::sm3))
constexpr simd< std::uint32_t, 4, Arch >	native::sm3partw1 (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
	Compute the first four-word SM3 message-schedule update, including lane-zero feedback.
template<isa< arm > Arch> requires (Arch.has(arm_feature::sm3))
constexpr simd< std::uint32_t, 4, Arch >	native::sm3partw2 (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
	Finish the four-word SM3 schedule update with the remaining XOR and rotation terms.

Detailed Description

Individual Advanced SIMD operations on four native-order uint32_t words. Runtime calls require the named instruction feature; the compiler's "sm4" target enables both SM3 and SM4. Admit target_features<arm>("sm4") before entering its compiled leaf. These operations do not modify FPCR, FPSR or NZCV. Feature-absent overloads are immediate-only and require NEON vector storage.

Function Documentation

sm3tt1a()

template<isa< arm > Arch, int Lane>
requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)

simd< std::uint32_t, 4, Arch > native::sm3tt1a ( simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words )

inlineconstexprexportnoexcept

Advance the reversed ABCD state by one early SM3 round using words[Lane]. Lane must be in [0, 3]; lane three holds A or E in the state and SS1 in ss1.

Definition at line 187 of file native.arm.sm3.ccm.

Here is the caller graph for this function:

sm3tt1b()

template<isa< arm > Arch, int Lane>
requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)

simd< std::uint32_t, 4, Arch > native::sm3tt1b ( simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words )

inlineconstexprexportnoexcept

Advance the reversed ABCD state by one late SM3 round using words[Lane]. Lane must be in [0, 3]; lane three holds A or E in the state and SS1 in ss1.

Definition at line 217 of file native.arm.sm3.ccm.

Here is the caller graph for this function:

sm3tt2a()

template<isa< arm > Arch, int Lane>
requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)

simd< std::uint32_t, 4, Arch > native::sm3tt2a ( simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words )

inlineconstexprexportnoexcept

Advance the reversed EFGH state by one early SM3 round using words[Lane]. Lane must be in [0, 3]; lane three holds A or E in the state and SS1 in ss1.

Definition at line 247 of file native.arm.sm3.ccm.

Here is the caller graph for this function:

sm3tt2b()

template<isa< arm > Arch, int Lane>
requires (Arch.has(arm_feature::sm3) && Lane >= 0 && Lane < 4)

simd< std::uint32_t, 4, Arch > native::sm3tt2b ( simd< std::uint32_t, 4, Arch > state, simd< std::uint32_t, 4, Arch > ss1, simd< std::uint32_t, 4, Arch > words )

inlineconstexprexportnoexcept

Advance the reversed EFGH state by one late SM3 round using words[Lane]. Lane must be in [0, 3]; lane three holds A or E in the state and SS1 in ss1.

Definition at line 277 of file native.arm.sm3.ccm.

Here is the caller graph for this function: