Masks and selection

Classes
struct	native::mask_lane< U >
struct	native::predicate< N, Arch >
struct	native::mask_traits< simd< T, N, Arch > >
struct	native::mask_traits< predicate< N, Arch > >
struct	native::mask_traits< mask_lane< U > >
struct	native::predicate< N, Arch >
struct	native::simd< bool, N, Arch >

Functions
template<class U, class T, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && simd_mask_element<U> && simd_mask_element<T> && requires { typename simd<U,N,Arch> ::native_type; typename simd<T,N,Arch>::native_type; }
constexpr simd< U, N, Arch >	native::mask_cast (simd< T, N, Arch > value) noexcept
template<class T, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && simd_mask_element<T> && ::native::detail::avx512_backend::predicate_shape<N> && requires { typename simd<T,N,Arch>::native_type; }
constexpr predicate< N, Arch >	native::to_predicate (simd< T, N, Arch > value) noexcept
template<class T, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && simd_mask_element<T> && ::native::detail::avx512_backend::predicate_shape<N> && requires { typename simd<T,N,Arch>::native_type; }
constexpr simd< T, N, Arch >	native::to_vector_mask (predicate< N, Arch > value) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::select (M m, simd< T, N, Arch > a, simd< T, N, Arch > b)
template<simd_integer_element T, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::integer_shape<T, N>
constexpr simd< T, N, Arch >	native::bit_select (simd< T, N, Arch > bits, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept
template<simd_integer_element T, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::integer_shape<T, N>
constexpr simd< T, N, Arch >	native::select (simd< T, N, Arch > bits, simd< T, N, Arch > a, simd< T, N, Arch > b)
template<simd_mask_element M, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch )
constexpr auto	native::mask_bits (simd< M, N, Arch > m) noexcept
template<simd_integer_element T, simd_mask_element M, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(sizeof(T) == sizeof(M))
constexpr simd< std::make_unsigned_t< T >, N, Arch >	native::mask_bits (simd< M, N, Arch > m) noexcept
template<simd_integer_element T, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && requires(predicate<N,Arch> m) { to_vector_mask <::native::detail::avx512_backend::mask_lane_for<T>>(m); }
constexpr simd< std::make_unsigned_t< T >, N, Arch >	native::mask_bits (predicate< N, Arch > m) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::masked_add (M m, simd< T, N, Arch > prior, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::masked_add_zero (M m, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::masked_sub (M m, simd< T, N, Arch > prior, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::masked_sub_zero (M m, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::masked_mul (M m, simd< T, N, Arch > prior, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept
template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> && ::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)
constexpr simd< T, N, Arch >	native::masked_mul_zero (M m, simd< T, N, Arch > a, simd< T, N, Arch > b) noexcept

Detailed Description

Comparisons produce V::mask. Use that type instead of assuming that every architecture stores a full register of zero/all-one lanes. Mask reductions inspect logical lanes only; padding in short vectors is not part of a result.

template<native::isa<> Arch>
void masks() {
  using V = native::simd<float, 4, Arch>;
  V x{1.f, 2.f, 3.f, 4.f};
  typename V::mask active = x < V(3.f);
  auto chosen = select(active, x, V(-1.f));
  check(any(active) && !all(active));
  check(all(chosen == V{1.f, 2.f, -1.f, -1.f}));
  auto words = mask_bits<std::uint32_t>(active);
  std::array<std::uint32_t, 4> bits{};
  words.store(bits.data());
  check(bits[0] == 0xffffffffu && bits[3] == 0);
}

Function Documentation

bit_select()

template<simd_integer_element T, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::integer_shape<T, N>

simd< T, N, Arch > native::bit_select ( simd< T, N, Arch > bits, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Select individual bits: (bits & a) | (~bits & b); no mask canonicalization.

Definition at line 3269 of file simd_family.h.

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mask_bits() [1/3]

template<simd_integer_element T, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) && requires(predicate<N,Arch> m) { to_vector_mask
<::native::detail::avx512_backend::mask_lane_for<T>>(m); }

simd< std::make_unsigned_t< T >, N, Arch > native::mask_bits ( predicate< N, Arch > m )

inlineconstexprnoexcept

Expand lane truth into unsigned integer zero/all-one words; preserve the lane count.

Definition at line 3304 of file simd_family.h.

mask_bits() [2/3]

template<simd_integer_element T, simd_mask_element M, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(sizeof(T) == sizeof(M))

simd< std::make_unsigned_t< T >, N, Arch > native::mask_bits ( simd< M, N, Arch > m )

inlineconstexprnoexcept

Expand lane truth into unsigned integer zero/all-one words; preserve the lane count.

Definition at line 3297 of file simd_family.h.

mask_bits() [3/3]

template<simd_mask_element M, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch )

auto native::mask_bits ( simd< M, N, Arch > m )

inlineconstexprnoexcept

Expand lane truth into unsigned integer zero/all-one words; preserve the lane count.

Definition at line 3289 of file simd_family.h.

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mask_cast()

template<class U, class T, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) && simd_mask_element<U> && simd_mask_element<T> && requires { typename simd<U,N,Arch>
::native_type; typename simd<T,N,Arch>::native_type; }

simd< U, N, Arch > native::mask_cast ( simd< T, N, Arch > value )

inlineconstexprnoexcept

Change full-mask lane width without changing lane truth or lane count.

Definition at line 805 of file simd_family.h.

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masked_add()

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::masked_add ( M m, simd< T, N, Arch > prior, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Add modulo the lane width in active lanes, retaining prior elsewhere.

Definition at line 3311 of file simd_family.h.

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masked_add_zero()

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::masked_add_zero ( M m, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Add modulo the lane width in active lanes and zero inactive lanes.

Definition at line 3325 of file simd_family.h.

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masked_mul()

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::masked_mul ( M m, simd< T, N, Arch > prior, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Multiply modulo the lane width in active lanes, retaining prior elsewhere.

Definition at line 3353 of file simd_family.h.

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masked_mul_zero()

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::masked_mul_zero ( M m, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Multiply modulo the lane width in active lanes and zero inactive lanes.

Definition at line 3367 of file simd_family.h.

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masked_sub()

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::masked_sub ( M m, simd< T, N, Arch > prior, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Subtract modulo the lane width in active lanes, retaining prior elsewhere.

Definition at line 3332 of file simd_family.h.

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masked_sub_zero()

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::masked_sub_zero ( M m, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Subtract modulo the lane width in active lanes and zero inactive lanes.

Definition at line 3346 of file simd_family.h.

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select() [1/2]

template<simd_integer_element T, std::size_t N, class M, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) &&(::native::detail::avx512_backend::integer_shape<T, N> &&
::native::detail::avx512_backend::integer_mask_for<M, T, N, Arch>)

simd< T, N, Arch > native::select ( M m, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Choose a in true lanes and b in false lanes; both operands are evaluated.

Definition at line 3250 of file simd_family.h.

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select() [2/2]

template<simd_integer_element T, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::integer_shape<T, N>

simd< T, N, Arch > native::select ( simd< T, N, Arch > bits, simd< T, N, Arch > a, simd< T, N, Arch > b )

inlineconstexprnoexcept

Choose a in true lanes and b in false lanes; both operands are evaluated.

Definition at line 3282 of file simd_family.h.

to_predicate()

template<class T, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) && simd_mask_element<T> && ::native::detail::avx512_backend::predicate_shape<N> && requires
{ typename simd<T,N,Arch>::native_type; }

predicate< N, Arch > native::to_predicate ( simd< T, N, Arch > value )

inlineconstexprnoexcept

Compress full-vector truth into a supported compact predicate.

Definition at line 812 of file simd_family.h.

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to_vector_mask()

template<class T, std::size_t N, ::native::isa<> Arch>
requires (::native::avx512 <= Arch ) && simd_mask_element<T> && ::native::detail::avx512_backend::predicate_shape<N> && requires
{ typename simd<T,N,Arch>::native_type; }

simd< T, N, Arch > native::to_vector_mask ( predicate< N, Arch > value )

inlineconstexprnoexcept

Expand a predicate to canonical zero/all-one lanes of mask element T.

Definition at line 834 of file simd_family.h.

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