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native 0.0.1
Vectors, masks and wide register packs for C++26
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Functions | |
| template<bool Flush = false, std::size_t L, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr simd< float, L, Arch > | native::exp2 (simd< float, L, Arch > input) noexcept |
| template<bool Flush = false, std::size_t L, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr std::array< simd< float, L, Arch >, N > | native::exp2 (std::array< simd< float, L, Arch >, N > const &input) noexcept |
| template<bool Flush, std::size_t L, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr simd< float, L, Arch > | native::exp2 (simd< float, L, Arch > input, std::bool_constant< Flush >) noexcept |
| template<bool Flush, std::size_t L, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr std::array< simd< float, L, Arch >, N > | native::exp2 (std::array< simd< float, L, Arch >, N > const &input, std::bool_constant< Flush >) noexcept |
| template<std::size_t L, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr simd< float, L, Arch > | native::atan2 (simd< float, L, Arch > y, simd< float, L, Arch > x) noexcept |
| template<std::size_t L, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr std::array< simd< float, L, Arch >, N > | native::atan2 (std::array< simd< float, L, Arch >, N > const &y, std::array< simd< float, L, Arch >, N > const &x) noexcept |
| template<bool Flush = false, unsigned Degree = 6, std::size_t L, ::native::isa<> Arch> requires (Degree >= 1 && Degree <= 7) && (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr simd< float, L, Arch > | native::exp (simd< float, L, Arch > input) noexcept |
| Evaluate the binary32 range-reduced exponential approximation. Degree selects a polynomial from one through seven, defaulting to six. Every degree shares range reduction and exponent scaling; none promises correctly rounded exp for every input. Flush selects the early underflow cutoff at compile time; it does not change CPU controls or turn a raw vector into a policy-bearing FTZ type. | |
| template<bool Flush = false, unsigned Degree = 6, std::size_t L, std::size_t N, ::native::isa<> Arch> requires (Degree >= 1 && Degree <= 7) && (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr std::array< simd< float, L, Arch >, N > | native::exp (std::array< simd< float, L, Arch >, N > const &input) noexcept |
| template<bool Flush, unsigned Degree = 6, std::size_t L, std::size_t N, ::native::isa<> Arch> requires (Degree >= 1 && Degree <= 7) && (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr std::array< simd< float, L, Arch >, N > | native::exp (std::array< simd< float, L, Arch >, N > const &input, std::bool_constant< Flush >, std::integral_constant< unsigned, Degree >={}) noexcept |
| template<bool Flush, unsigned Degree = 6, std::size_t L, ::native::isa<> Arch> requires (Degree >= 1 && Degree <= 7) && (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<L> | |
| constexpr simd< float, L, Arch > | native::exp (simd< float, L, Arch > input, std::bool_constant< Flush >, std::integral_constant< unsigned, Degree >={}) noexcept |
| template<std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::native_scaleb_shape<N> &&(std::same_as<M,typename simd <float,N,Arch>::mask_type> || std::same_as<M,typename simd<float,N,Arch>::vector_mask_type>) | |
| constexpr simd< float, N, Arch > | native::masked_scaleb (M maskmask, simd< float, N, Arch > prior, simd< float, N, Arch > value, simd< float, N, Arch > exponent) noexcept |
| template<std::size_t N, class M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::native_scaleb_shape<N> &&(std::same_as<M,typename simd <float,N,Arch>::mask_type> || std::same_as<M,typename simd<float,N,Arch>::vector_mask_type>) | |
| constexpr simd< float, N, Arch > | native::masked_scaleb_zero (M maskmask, simd< float, N, Arch > value, simd< float, N, Arch > exponent) noexcept |
| template<std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::native_scaleb_shape<N> | |
| constexpr simd< float, N, Arch > | native::scaleb (simd< float, N, Arch > value, simd< float, N, Arch > exponent) noexcept |
| template<std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr auto | native::abs (simd< float, N, Arch > a) noexcept |
| template<class To, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> && std::same_as<To,std::int32_t> | |
| constexpr simd< To, N, Arch > | native::convert (simd< float, N, Arch > x) noexcept |
| template<class To, std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> && std::same_as<To,float> | |
| constexpr simd< To, N, Arch > | native::convert (simd< std::int32_t, N, Arch > x) noexcept |
| template<std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr simd< float, N, Arch > | native::floor (simd< float, N, Arch > x) noexcept |
| template<std::size_t N, std::size_t M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr std::array< simd< float, N, Arch >, M > | native::floor (std::array< simd< float, N, Arch >, M > const &input) noexcept |
| template<std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr simd< float, N, Arch > | native::ceil (simd< float, N, Arch > x) noexcept |
| template<std::size_t N, std::size_t M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr std::array< simd< float, N, Arch >, M > | native::ceil (std::array< simd< float, N, Arch >, M > const &input) noexcept |
| template<std::size_t N, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr simd< float, N, Arch > | native::trunc (simd< float, N, Arch > x) noexcept |
| template<std::size_t N, std::size_t M, ::native::isa<> Arch> requires (::native::avx512 <= Arch ) && ::native::detail::avx512_backend::float_shape<N> | |
| constexpr std::array< simd< float, N, Arch >, M > | native::trunc (std::array< simd< float, N, Arch >, M > const &input) noexcept |
At runtime, raw float operations inherit the caller's floating-point environment. Constant evaluation uses nearest-even rounding and gradual underflow, without accessing floating-point controls or status flags. They do not establish FTZ policy or a reproducible scalar type. Use unqualified calls in generic code so the element library can supply its own operations.
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inlineconstexprnoexcept |
Clear each binary32 sign bit, preserving the remaining payload bits.
Definition at line 4475 of file simd_family.h.
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inlineconstexprnoexcept |
Evaluate atan2(y,x), retaining the common SIMD architecture and lane count.
Definition at line 91 of file exp_body.h.
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inlineconstexprnoexcept |
Advance each atan2 stage across matching arrays of independent registers.
Definition at line 97 of file exp_body.h.
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inlineconstexprnoexcept |
Round each lane toward positive infinity, independently of ambient rounding. Signed zeros and infinities are preserved; NaNs remain NaNs. Raw denormal handling still follows the CPU environment. No NaN payload or FP-status promise is added.
Definition at line 5158 of file simd_family.h.
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inlineconstexprnoexcept |
Apply ceil to each register in an array; an empty array performs no lane work.
Definition at line 5164 of file simd_family.h.
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inlineconstexprnoexcept |
Convert floats to signed 32-bit integers by truncation toward zero.
Definition at line 4562 of file simd_family.h.
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inlineconstexprnoexcept |
Numerically convert signed 32-bit integers to binary32. This is not a bit cast. Values outside binary32's exact integer range round.
Definition at line 4585 of file simd_family.h.
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inlineconstexprnoexcept |
Evaluate the binary32 range-reduced exponential approximation. Degree selects a polynomial from one through seven, defaulting to six. Every degree shares range reduction and exponent scaling; none promises correctly rounded exp for every input. Flush selects the early underflow cutoff at compile time; it does not change CPU controls or turn a raw vector into a policy-bearing FTZ type.
Definition at line 109 of file exp_body.h.
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inlineconstexprnoexcept |
Pass cutoff and degree through constant tags for dependent calls.
Definition at line 130 of file exp_body.h.
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inlineconstexprnoexcept |
Evaluate exp stage by stage across independent registers; N may be zero.
Definition at line 115 of file exp_body.h.
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inlineconstexprnoexcept |
Pass cutoff and degree through constant tags for dependent calls.
Definition at line 123 of file exp_body.h.
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inlineconstexprnoexcept |
Base-two exponential with the same compile-time underflow policy as exp.
Definition at line 65 of file exp_body.h.
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inlineconstexprnoexcept |
Select exp2's underflow policy through a tag for dependent calls.
Definition at line 77 of file exp_body.h.
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inlineconstexprnoexcept |
Evaluate exp2 stage by stage across independent registers.
Definition at line 71 of file exp_body.h.
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inlineconstexprnoexcept |
Select exp2's underflow policy for a register batch through a tag.
Definition at line 83 of file exp_body.h.
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inlineconstexprnoexcept |
Round each lane toward negative infinity, independently of ambient rounding. Signed zeros and infinities are preserved; NaNs remain NaNs. Raw denormal handling still follows the CPU environment. No NaN payload or FP-status promise is added.
Definition at line 5142 of file simd_family.h.
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inlineconstexprnoexcept |
Apply floor to each register in an array; an empty array performs no lane work.
Definition at line 5148 of file simd_family.h.
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inlineconstexprnoexcept |
Scale active lanes by 2^floor(exponent), retaining prior in other lanes. Inactive lanes are excluded from the scaling operation. The result follows the caller's floating-point environment, including denormal controls. Available only for native AVX512F scaling shapes; packed widths below 16 require AVX512VL. No scalar, AVX2, NEON or Wasm software fallback exists.
Definition at line 4345 of file simd_family.h.
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inlineconstexprnoexcept |
Scale active lanes by 2^floor(exponent), writing positive zero elsewhere.
Definition at line 4379 of file simd_family.h.
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inlineconstexprnoexcept |
Scale every lane by 2^floor(exponent), including fractional exponents. Unlike an integer ldexp exponent, the exponent argument is itself a vector.
Definition at line 4399 of file simd_family.h.
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inlineconstexprnoexcept |
Round each lane toward zero, independently of ambient rounding. Signed zeros and infinities are preserved; NaNs remain NaNs. Raw denormal handling still follows the CPU environment. No NaN payload or FP-status promise is added.
Definition at line 5174 of file simd_family.h.
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inlineconstexprnoexcept |
Apply trunc to each register in an array; an empty array performs no lane work.
Definition at line 5180 of file simd_family.h.