CRC32C

Collaboration diagram for CRC32C:

Functions
template<isa< x86 > Arch = NATIVE_BASELINE> requires (Arch.has(x86_feature::crc32))
constexpr std::uint32_t	native::crc32c (std::uint32_t accumulator, std::uint8_t value) noexcept
	Update a 32-bit CRC32C accumulator with exactly eight bits.
template<isa< x86 > Arch = NATIVE_BASELINE> requires (Arch.has(x86_feature::crc32))
constexpr std::uint32_t	native::crc32c (std::uint32_t accumulator, std::uint16_t value) noexcept
	Update a 32-bit CRC32C accumulator with exactly sixteen bits.
template<isa< x86 > Arch = NATIVE_BASELINE> requires (Arch.has(x86_feature::crc32))
constexpr std::uint32_t	native::crc32c (std::uint32_t accumulator, std::uint32_t value) noexcept
	Update a 32-bit CRC32C accumulator with exactly thirty-two bits.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::crc32))
constexpr std::uint32_t	native::crc32c (std::uint32_t accumulator, std::uint64_t value) noexcept

Detailed Description

Raw Castagnoli CRC updates requiring CPUID leaf 1 ECX bit 20. Runtime calls require Arch to contain x86_feature::crc32; the caller must enable and admit that feature. No vector OS state is required. Each update consumes the operand's bits from least to most significant, using reflected polynomial 0x82f63b78. No initial or final complement is applied. Constant evaluation supports every x86 Arch; weak tags select consteval overloads.

Export raw CRC32C updates for unsigned 8-, 16-, 32- and 64-bit operands.

Function Documentation

crc32c()

template<isa< x86 > Arch>
requires (Arch.has(x86_feature::crc32))

std::uint32_t native::crc32c ( std::uint32_t accumulator, std::uint64_t value )

inlineconstexprnoexcept

Update with sixty-four bits in x86-64 mode; the CRC remains 32 bits. The instruction zeroes the high half of its 64-bit destination register.

Definition at line 62 of file crc32c.h.