PCLMULQDQ

Collaboration diagram for PCLMULQDQ:

Functions
template<isa< x86 > Arch, unsigned Imm8> requires (Arch.has(x86_feature::pclmul) && Imm8 <= 255)
constexpr simd< std::uint64_t, 2, Arch >	native::pclmulqdq (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
template<isa< x86 > Arch, unsigned Imm8, class... Args>
void	native::pclmulqdq (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.

Detailed Description

Exact multiplication of two binary polynomials of degree at most 63. Bit i of an input is the coefficient of x^i. Addition is XOR, with no carries or reduction; result bit 127 is always zero. Imm8 bit 0 selects the high (1) or low (0) half of a, and bit 4 selects the half of b. Other immediate bits are ignored. Imm8 must be in [0,255]. Arch records requirements; the caller must separately enable and admit its target. These pure integer operations do not affect floating-point status. Constant evaluation uses exact integer semantics. Tags without the instruction features are accepted only at compile time and require complete SIMD storage.

Function Documentation

pclmulqdq()

template<isa< x86 > Arch, unsigned Imm8>
requires (Arch.has(x86_feature::pclmul) && Imm8 <= 255)

simd< std::uint64_t, 2, Arch > native::pclmulqdq ( simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b )

inlineconstexprexportnoexcept

Multiply the selected 64-bit halves into one 128-bit polynomial product. Requires PCLMUL. An AVX-enabled caller may use the VEX encoding.

Definition at line 29 of file native.x86.pclmul.ccm.

Here is the caller graph for this function: