SHA512

Collaboration diagram for SHA512:

Functions
template<isa< x86 > Arch> requires (Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx))
constexpr simd< std::uint64_t, 4, Arch >	native::sha512msg1 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
	First SHA-512 schedule step; only the low lane of b is used.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx))
constexpr simd< std::uint64_t, 4, Arch >	native::sha512msg2 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 4, Arch > b) noexcept
	Final SHA-512 schedule step with recurrence through the low output lanes.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx))
constexpr simd< std::uint64_t, 4, Arch >	native::sha512rnds2 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 4, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
	Two SHA-512 rounds: a is CDGH, b is ABEF, c contains two message-plus-constant words.
template<isa< x86 > Arch, class... Args>
void	native::sha512msg1 (Args...)=delete
	Reject raw registers, mixed requirements and unsupported shapes.
template<isa< x86 > Arch, class... Args>
void	native::sha512msg2 (Args...)=delete
	Reject raw registers, mixed requirements and unsupported shapes.
template<isa< x86 > Arch, class... Args>
void	native::sha512rnds2 (Args...)=delete
	Reject raw registers, mixed requirements and unsupported shapes.

Detailed Description

Runtime calls require AVX and SHA512, matching compiler targets and OS vector state. Constant evaluation preserves the instruction lane packing and modulo-word arithmetic. Missing-feature overloads are constant-evaluation-only.