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native 0.0.1
Vectors, masks and wide register packs for C++26
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Functions | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::vpermb (simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > value) noexcept |
| Permute bytes across the whole vector using the low index bits. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::mask_vpermb (simd< std::uint8_t, 16, Arch > source, predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > value) noexcept |
| Inactive destination bytes retain source. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::maskz_vpermb (predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > value) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::vpermt2b (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > b) noexcept |
| Permute bytes from two tables; the table index spans both complete vectors. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::mask_vpermt2b (simd< std::uint8_t, 16, Arch > a, predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > b) noexcept |
| Inactive destination bytes retain the first table a. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::maskz_vpermt2b (predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > b) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::vpermi2b (simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept |
| Permute bytes from two tables with the index vector as the tied destination. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::mask_vpermi2b (simd< std::uint8_t, 16, Arch > indices, predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept |
| Inactive destination bytes retain the index vector. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::maskz_vpermi2b (predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > indices, simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::vpmultishiftqb (simd< std::uint8_t, 16, Arch > control, simd< std::uint64_t, 2, Arch > value) noexcept |
| Select eight wrapping bits per control byte from its corresponding source qword. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::mask_vpmultishiftqb (simd< std::uint8_t, 16, Arch > source, predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > control, simd< std::uint64_t, 2, Arch > value) noexcept |
| Inactive destination bytes retain source. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 16, Arch > | native::maskz_vpmultishiftqb (predicate< 16, Arch > maskmask, simd< std::uint8_t, 16, Arch > control, simd< std::uint64_t, 2, Arch > value) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::vpermb (simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > value) noexcept |
| Permute bytes across the whole vector using the low index bits. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::mask_vpermb (simd< std::uint8_t, 32, Arch > source, predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > value) noexcept |
| Inactive destination bytes retain source. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::maskz_vpermb (predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > value) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::vpermt2b (simd< std::uint8_t, 32, Arch > a, simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > b) noexcept |
| Permute bytes from two tables; the table index spans both complete vectors. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::mask_vpermt2b (simd< std::uint8_t, 32, Arch > a, predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > b) noexcept |
| Inactive destination bytes retain the first table a. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::maskz_vpermt2b (predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > a, simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > b) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::vpermi2b (simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > a, simd< std::uint8_t, 32, Arch > b) noexcept |
| Permute bytes from two tables with the index vector as the tied destination. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::mask_vpermi2b (simd< std::uint8_t, 32, Arch > indices, predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > a, simd< std::uint8_t, 32, Arch > b) noexcept |
| Inactive destination bytes retain the index vector. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::maskz_vpermi2b (predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > indices, simd< std::uint8_t, 32, Arch > a, simd< std::uint8_t, 32, Arch > b) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::vpmultishiftqb (simd< std::uint8_t, 32, Arch > control, simd< std::uint64_t, 4, Arch > value) noexcept |
| Select eight wrapping bits per control byte from its corresponding source qword. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::mask_vpmultishiftqb (simd< std::uint8_t, 32, Arch > source, predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > control, simd< std::uint64_t, 4, Arch > value) noexcept |
| Inactive destination bytes retain source. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi) && Arch.has(x86_feature::avx512vl)) | |
| constexpr simd< std::uint8_t, 32, Arch > | native::maskz_vpmultishiftqb (predicate< 32, Arch > maskmask, simd< std::uint8_t, 32, Arch > control, simd< std::uint64_t, 4, Arch > value) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::vpermb (simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > value) noexcept |
| Permute bytes across the whole vector using the low index bits. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::mask_vpermb (simd< std::uint8_t, 64, Arch > source, predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > value) noexcept |
| Inactive destination bytes retain source. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::maskz_vpermb (predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > value) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::vpermt2b (simd< std::uint8_t, 64, Arch > a, simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > b) noexcept |
| Permute bytes from two tables; the table index spans both complete vectors. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::mask_vpermt2b (simd< std::uint8_t, 64, Arch > a, predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > b) noexcept |
| Inactive destination bytes retain the first table a. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::maskz_vpermt2b (predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > a, simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > b) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::vpermi2b (simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > a, simd< std::uint8_t, 64, Arch > b) noexcept |
| Permute bytes from two tables with the index vector as the tied destination. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::mask_vpermi2b (simd< std::uint8_t, 64, Arch > indices, predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > a, simd< std::uint8_t, 64, Arch > b) noexcept |
| Inactive destination bytes retain the index vector. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::maskz_vpermi2b (predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > indices, simd< std::uint8_t, 64, Arch > a, simd< std::uint8_t, 64, Arch > b) noexcept |
| Inactive destination bytes become zero. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::vpmultishiftqb (simd< std::uint8_t, 64, Arch > control, simd< std::uint64_t, 8, Arch > value) noexcept |
| Select eight wrapping bits per control byte from its corresponding source qword. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::mask_vpmultishiftqb (simd< std::uint8_t, 64, Arch > source, predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > control, simd< std::uint64_t, 8, Arch > value) noexcept |
| Inactive destination bytes retain source. | |
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template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512bw) && Arch.has(x86_feature::avx512vbmi)) | |
| constexpr simd< std::uint8_t, 64, Arch > | native::maskz_vpmultishiftqb (predicate< 64, Arch > maskmask, simd< std::uint8_t, 64, Arch > control, simd< std::uint64_t, 8, Arch > value) noexcept |
| Inactive destination bytes become zero. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::vpermb (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::mask_vpermb (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::maskz_vpermb (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::vpermt2b (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::mask_vpermt2b (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::maskz_vpermt2b (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::vpermi2b (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::mask_vpermi2b (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::maskz_vpermi2b (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::vpmultishiftqb (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::mask_vpmultishiftqb (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::maskz_vpmultishiftqb (Args...)=delete |
| Reject unsupported signatures, including implicit raw-register conversions. | |
Byte permutations across whole vectors and circular qword bit windows. Runtime targets require AVX512F, AVX512BW and AVX512VBMI; 128/256-bit forms also require AVX512VL. Admit CPU features and OS ZMM state before entry. Single-table indices use log2(lanes) bits; two-table indices use one more. VPERMI2B merges inactive index lanes; VPERMT2B merges inactive first-table lanes. Multishift selects eight wrapping bits from the corresponding qword. Constant evaluation uses exact integer semantics. Weaker tags are accepted only at compile time and still require complete SIMD storage.