AVX-512VPOPCNTDQ

Collaboration diagram for AVX-512VPOPCNTDQ:

Functions
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq))
constexpr simd< std::uint32_t, 16, Arch >	native::vpopcntd (simd< std::uint32_t, 16, Arch > value) noexcept
	Count set bits in each of the 16 32-bit lanes; results are in [0, 32].
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq))
constexpr simd< std::uint32_t, 16, Arch >	native::mask_vpopcntd (simd< std::uint32_t, 16, Arch > source, predicate< 16, Arch > maskmask, simd< std::uint32_t, 16, Arch > value) noexcept
	Inactive lanes retain source; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq))
constexpr simd< std::uint32_t, 16, Arch >	native::maskz_vpopcntd (predicate< 16, Arch > maskmask, simd< std::uint32_t, 16, Arch > value) noexcept
	Inactive lanes become zero; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq))
constexpr simd< std::uint64_t, 8, Arch >	native::vpopcntq (simd< std::uint64_t, 8, Arch > value) noexcept
	Count set bits in each of the 8 64-bit lanes; results are in [0, 64].
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq))
constexpr simd< std::uint64_t, 8, Arch >	native::mask_vpopcntq (simd< std::uint64_t, 8, Arch > source, predicate< 8, Arch > maskmask, simd< std::uint64_t, 8, Arch > value) noexcept
	Inactive lanes retain source; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq))
constexpr simd< std::uint64_t, 8, Arch >	native::maskz_vpopcntq (predicate< 8, Arch > maskmask, simd< std::uint64_t, 8, Arch > value) noexcept
	Inactive lanes become zero; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint32_t, 4, Arch >	native::vpopcntd (simd< std::uint32_t, 4, Arch > value) noexcept
	Count set bits in each of the 4 32-bit lanes; results are in [0, 32].
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint32_t, 4, Arch >	native::mask_vpopcntd (simd< std::uint32_t, 4, Arch > source, predicate< 4, Arch > maskmask, simd< std::uint32_t, 4, Arch > value) noexcept
	Inactive lanes retain source; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint32_t, 4, Arch >	native::maskz_vpopcntd (predicate< 4, Arch > maskmask, simd< std::uint32_t, 4, Arch > value) noexcept
	Inactive lanes become zero; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint64_t, 2, Arch >	native::vpopcntq (simd< std::uint64_t, 2, Arch > value) noexcept
	Count set bits in each of the 2 64-bit lanes; results are in [0, 64].
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint64_t, 2, Arch >	native::mask_vpopcntq (simd< std::uint64_t, 2, Arch > source, predicate< 2, Arch > maskmask, simd< std::uint64_t, 2, Arch > value) noexcept
	Inactive lanes retain source; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint64_t, 2, Arch >	native::maskz_vpopcntq (predicate< 2, Arch > maskmask, simd< std::uint64_t, 2, Arch > value) noexcept
	Inactive lanes become zero; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint32_t, 8, Arch >	native::vpopcntd (simd< std::uint32_t, 8, Arch > value) noexcept
	Count set bits in each of the 8 32-bit lanes; results are in [0, 32].
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint32_t, 8, Arch >	native::mask_vpopcntd (simd< std::uint32_t, 8, Arch > source, predicate< 8, Arch > maskmask, simd< std::uint32_t, 8, Arch > value) noexcept
	Inactive lanes retain source; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint32_t, 8, Arch >	native::maskz_vpopcntd (predicate< 8, Arch > maskmask, simd< std::uint32_t, 8, Arch > value) noexcept
	Inactive lanes become zero; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint64_t, 4, Arch >	native::vpopcntq (simd< std::uint64_t, 4, Arch > value) noexcept
	Count set bits in each of the 4 64-bit lanes; results are in [0, 64].
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint64_t, 4, Arch >	native::mask_vpopcntq (simd< std::uint64_t, 4, Arch > source, predicate< 4, Arch > maskmask, simd< std::uint64_t, 4, Arch > value) noexcept
	Inactive lanes retain source; mask bits above the lane count are ignored.
template<isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vpopcntdq) && Arch.has(x86_feature::avx512vl))
constexpr simd< std::uint64_t, 4, Arch >	native::maskz_vpopcntq (predicate< 4, Arch > maskmask, simd< std::uint64_t, 4, Arch > value) noexcept
	Inactive lanes become zero; mask bits above the lane count are ignored.
template<isa< x86 > Arch, class... Args>
void	native::vpopcntd (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.
template<isa< x86 > Arch, class... Args>
void	native::mask_vpopcntd (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.
template<isa< x86 > Arch, class... Args>
void	native::maskz_vpopcntd (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.
template<isa< x86 > Arch, class... Args>
void	native::vpopcntq (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.
template<isa< x86 > Arch, class... Args>
void	native::mask_vpopcntq (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.
template<isa< x86 > Arch, class... Args>
void	native::maskz_vpopcntq (Args...)=delete
	Reject unsupported signatures, including implicit raw-register conversions.

Detailed Description

Population counts of independent 32-bit and 64-bit integer lanes. Runtime calls require Arch to contain AVX512F and AVX512VPOPCNTDQ; 128/256-bit forms also require AVX512VL. Admit CPU features and OS ZMM state before entering a matching target scope. These operations do not access memory or flags. Constant evaluation uses exact integer semantics. Tags without the instruction features are accepted only at compile time and require complete SIMD storage.