native.arm.fp16fml Module Reference

Exported Modules
module	native.arm.features
module	native.simd

Functions
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 2, Arch >	native::fmlal (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Add products from the low 2 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 2, Arch >	native::fmlal (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 2, Arch >	native::fmlal_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLAL with b[Lane] broadcast; selects the low 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 2, Arch >	native::fmlal_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 2, Arch >	native::fmlal_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLAL with b[Lane] broadcast; selects the low 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 2, Arch >	native::fmlal_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 4, Arch >	native::fmlal (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Add products from the low 4 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 4, Arch >	native::fmlal (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 4, Arch >	native::fmlal_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLAL with b[Lane] broadcast; selects the low 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 4, Arch >	native::fmlal_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 4, Arch >	native::fmlal_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLAL with b[Lane] broadcast; selects the low 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 4, Arch >	native::fmlal_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 2, Arch >	native::fmlal2 (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Add products from the high 2 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 2, Arch >	native::fmlal2 (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 2, Arch >	native::fmlal2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLAL2 with b[Lane] broadcast; selects the high 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 2, Arch >	native::fmlal2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 2, Arch >	native::fmlal2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLAL2 with b[Lane] broadcast; selects the high 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 2, Arch >	native::fmlal2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 4, Arch >	native::fmlal2 (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Add products from the high 4 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 4, Arch >	native::fmlal2 (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 4, Arch >	native::fmlal2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLAL2 with b[Lane] broadcast; selects the high 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 4, Arch >	native::fmlal2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 4, Arch >	native::fmlal2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLAL2 with b[Lane] broadcast; selects the high 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 4, Arch >	native::fmlal2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 2, Arch >	native::fmlsl (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Subtract products from the low 2 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 2, Arch >	native::fmlsl (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 2, Arch >	native::fmlsl_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLSL with b[Lane] broadcast; selects the low 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 2, Arch >	native::fmlsl_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 2, Arch >	native::fmlsl_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLSL with b[Lane] broadcast; selects the low 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 2, Arch >	native::fmlsl_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 4, Arch >	native::fmlsl (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Subtract products from the low 4 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 4, Arch >	native::fmlsl (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 4, Arch >	native::fmlsl_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLSL with b[Lane] broadcast; selects the low 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 4, Arch >	native::fmlsl_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 4, Arch >	native::fmlsl_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLSL with b[Lane] broadcast; selects the low 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 4, Arch >	native::fmlsl_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 2, Arch >	native::fmlsl2 (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Subtract products from the high 2 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 2, Arch >	native::fmlsl2 (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 2, Arch >	native::fmlsl2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLSL2 with b[Lane] broadcast; selects the high 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 2, Arch >	native::fmlsl2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 2, Arch >	native::fmlsl2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLSL2 with b[Lane] broadcast; selects the high 2 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 2, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 2, Arch >	native::fmlsl2_lane (simd< float, 2, Arch > acc, simd< fp16, 4, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch> requires (Arch.has(arm_feature::fp16fml))
constexpr simd< float, 4, Arch >	native::fmlsl2 (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Subtract products from the high 4 half lanes of a and b.
template<isa< arm > Arch> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)))
consteval simd< float, 4, Arch >	native::fmlsl2 (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 4)
constexpr simd< float, 4, Arch >	native::fmlsl2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	FMLSL2 with b[Lane] broadcast; selects the high 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && requires { sizeof(simd<fp16, 4, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 4)
consteval simd< float, 4, Arch >	native::fmlsl2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 4, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.
template<isa< arm > Arch, unsigned Lane> requires (Arch.has(arm_feature::fp16fml) && Lane < 8)
constexpr simd< float, 4, Arch >	native::fmlsl2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	FMLSL2 with b[Lane] broadcast; selects the high 4 lanes of a.
template<isa< arm > Arch, unsigned Lane> requires (requires { sizeof(simd<float, 4, Arch>); } && requires { sizeof(simd<fp16, 8, Arch>); } && !(Arch.has(arm_feature::fp16fml)) && Lane < 8)
consteval simd< float, 4, Arch >	native::fmlsl2_lane (simd< float, 4, Arch > acc, simd< fp16, 8, Arch > a, simd< fp16, 8, Arch > b) noexcept
	Constant-evaluation-only form when the instruction feature is absent.

Files
file	src/native.arm.fp16fml.ccm