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native 0.0.1
Vectors, masks and wide register packs for C++26
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Exported Modules | |
| module | native.arm.features |
| module | native.simd |
Functions | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (Arch.has(arm_feature::rdm)) | |
| constexpr int16_t | native::sqrdmlah (int16_t accumulator, int16_t lhs, int16_t rhs) noexcept |
| SQRDMLAH: signed 16-bit rounding saturating add. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (!Arch.has(arm_feature::rdm)) | |
| consteval int16_t | native::sqrdmlah (int16_t accumulator, int16_t lhs, int16_t rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr int16_t | native::sqrdmlah_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int16_t, 4, Arch>); }) | |
| consteval int16_t | native::sqrdmlah_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8) | |
| constexpr int16_t | native::sqrdmlah_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8 && requires { sizeof(simd<std::int16_t, 8, Arch>); }) | |
| consteval int16_t | native::sqrdmlah_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int16_t, 4, Arch > | native::sqrdmlah (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLAH: signed 16-bit rounding saturating add. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int16_t, 4, Arch>); }) | |
| consteval simd< std::int16_t, 4, Arch > | native::sqrdmlah (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int16_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int16_t, 4, Arch>); }) | |
| consteval simd< std::int16_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8) | |
| constexpr simd< std::int16_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8 && requires { sizeof(simd<std::int16_t, 4, Arch>); sizeof(simd <std::int16_t, 8, Arch>); }) | |
| consteval simd< std::int16_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int16_t, 8, Arch > | native::sqrdmlah (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLAH: signed 16-bit rounding saturating add. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int16_t, 8, Arch>); }) | |
| consteval simd< std::int16_t, 8, Arch > | native::sqrdmlah (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int16_t, 8, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int16_t, 8, Arch>); sizeof(simd <std::int16_t, 4, Arch>); }) | |
| consteval simd< std::int16_t, 8, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8) | |
| constexpr simd< std::int16_t, 8, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8 && requires { sizeof(simd<std::int16_t, 8, Arch>); }) | |
| consteval simd< std::int16_t, 8, Arch > | native::sqrdmlah_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (Arch.has(arm_feature::rdm)) | |
| constexpr int32_t | native::sqrdmlah (int32_t accumulator, int32_t lhs, int32_t rhs) noexcept |
| SQRDMLAH: signed 32-bit rounding saturating add. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (!Arch.has(arm_feature::rdm)) | |
| consteval int32_t | native::sqrdmlah (int32_t accumulator, int32_t lhs, int32_t rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2) | |
| constexpr int32_t | native::sqrdmlah_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2 && requires { sizeof(simd<std::int32_t, 2, Arch>); }) | |
| consteval int32_t | native::sqrdmlah_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr int32_t | native::sqrdmlah_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int32_t, 4, Arch>); }) | |
| consteval int32_t | native::sqrdmlah_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int32_t, 2, Arch > | native::sqrdmlah (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLAH: signed 32-bit rounding saturating add. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int32_t, 2, Arch>); }) | |
| consteval simd< std::int32_t, 2, Arch > | native::sqrdmlah (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2) | |
| constexpr simd< std::int32_t, 2, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2 && requires { sizeof(simd<std::int32_t, 2, Arch>); }) | |
| consteval simd< std::int32_t, 2, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int32_t, 2, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int32_t, 2, Arch>); sizeof(simd <std::int32_t, 4, Arch>); }) | |
| consteval simd< std::int32_t, 2, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int32_t, 4, Arch > | native::sqrdmlah (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLAH: signed 32-bit rounding saturating add. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int32_t, 4, Arch>); }) | |
| consteval simd< std::int32_t, 4, Arch > | native::sqrdmlah (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2) | |
| constexpr simd< std::int32_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2 && requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd <std::int32_t, 2, Arch>); }) | |
| consteval simd< std::int32_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int32_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLAH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int32_t, 4, Arch>); }) | |
| consteval simd< std::int32_t, 4, Arch > | native::sqrdmlah_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (Arch.has(arm_feature::rdm)) | |
| constexpr int16_t | native::sqrdmlsh (int16_t accumulator, int16_t lhs, int16_t rhs) noexcept |
| SQRDMLSH: signed 16-bit rounding saturating subtract. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (!Arch.has(arm_feature::rdm)) | |
| consteval int16_t | native::sqrdmlsh (int16_t accumulator, int16_t lhs, int16_t rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr int16_t | native::sqrdmlsh_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int16_t, 4, Arch>); }) | |
| consteval int16_t | native::sqrdmlsh_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8) | |
| constexpr int16_t | native::sqrdmlsh_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8 && requires { sizeof(simd<std::int16_t, 8, Arch>); }) | |
| consteval int16_t | native::sqrdmlsh_lane (int16_t accumulator, int16_t lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int16_t, 4, Arch > | native::sqrdmlsh (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLSH: signed 16-bit rounding saturating subtract. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int16_t, 4, Arch>); }) | |
| consteval simd< std::int16_t, 4, Arch > | native::sqrdmlsh (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int16_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int16_t, 4, Arch>); }) | |
| consteval simd< std::int16_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8) | |
| constexpr simd< std::int16_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8 && requires { sizeof(simd<std::int16_t, 4, Arch>); sizeof(simd <std::int16_t, 8, Arch>); }) | |
| consteval simd< std::int16_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 4, Arch > accumulator, simd< std::int16_t, 4, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int16_t, 8, Arch > | native::sqrdmlsh (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLSH: signed 16-bit rounding saturating subtract. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int16_t, 8, Arch>); }) | |
| consteval simd< std::int16_t, 8, Arch > | native::sqrdmlsh (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int16_t, 8, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int16_t, 8, Arch>); sizeof(simd <std::int16_t, 4, Arch>); }) | |
| consteval simd< std::int16_t, 8, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8) | |
| constexpr simd< std::int16_t, 8, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 8 && requires { sizeof(simd<std::int16_t, 8, Arch>); }) | |
| consteval simd< std::int16_t, 8, Arch > | native::sqrdmlsh_lane (simd< std::int16_t, 8, Arch > accumulator, simd< std::int16_t, 8, Arch > lhs, simd< std::int16_t, 8, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (Arch.has(arm_feature::rdm)) | |
| constexpr int32_t | native::sqrdmlsh (int32_t accumulator, int32_t lhs, int32_t rhs) noexcept |
| SQRDMLSH: signed 32-bit rounding saturating subtract. | |
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template<isa< arm > Arch = NATIVE_BASELINE> requires (!Arch.has(arm_feature::rdm)) | |
| consteval int32_t | native::sqrdmlsh (int32_t accumulator, int32_t lhs, int32_t rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2) | |
| constexpr int32_t | native::sqrdmlsh_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2 && requires { sizeof(simd<std::int32_t, 2, Arch>); }) | |
| consteval int32_t | native::sqrdmlsh_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr int32_t | native::sqrdmlsh_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int32_t, 4, Arch>); }) | |
| consteval int32_t | native::sqrdmlsh_lane (int32_t accumulator, int32_t lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int32_t, 2, Arch > | native::sqrdmlsh (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLSH: signed 32-bit rounding saturating subtract. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int32_t, 2, Arch>); }) | |
| consteval simd< std::int32_t, 2, Arch > | native::sqrdmlsh (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2) | |
| constexpr simd< std::int32_t, 2, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2 && requires { sizeof(simd<std::int32_t, 2, Arch>); }) | |
| consteval simd< std::int32_t, 2, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int32_t, 2, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int32_t, 2, Arch>); sizeof(simd <std::int32_t, 4, Arch>); }) | |
| consteval simd< std::int32_t, 2, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 2, Arch > accumulator, simd< std::int32_t, 2, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch> requires (Arch.has(arm_feature::rdm)) | |
| constexpr simd< std::int32_t, 4, Arch > | native::sqrdmlsh (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLSH: signed 32-bit rounding saturating subtract. | |
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template<isa< arm > Arch> requires (!Arch.has(arm_feature::rdm) && requires { sizeof(simd<std::int32_t, 4, Arch>); }) | |
| consteval simd< std::int32_t, 4, Arch > | native::sqrdmlsh (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2) | |
| constexpr simd< std::int32_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 2 && requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd <std::int32_t, 2, Arch>); }) | |
| consteval simd< std::int32_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 2, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
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template<isa< arm > Arch, int Lane> requires (Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4) | |
| constexpr simd< std::int32_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| SQRDMLSH by element: broadcast rhs[Lane] before rounding and saturation. | |
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template<isa< arm > Arch, int Lane> requires (!Arch.has(arm_feature::rdm) && Lane >= 0 && Lane < 4 && requires { sizeof(simd<std::int32_t, 4, Arch>); }) | |
| consteval simd< std::int32_t, 4, Arch > | native::sqrdmlsh_lane (simd< std::int32_t, 4, Arch > accumulator, simd< std::int32_t, 4, Arch > lhs, simd< std::int32_t, 4, Arch > rhs) noexcept |
| Evaluate constant operands without the instruction feature. | |
Files | |
| file | src/native.arm.rdm.ccm |