native 0.0.1
Vectors, masks and wide register packs for C++26
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native.arm.sha Module Reference

Exported Modules

module  native.arm.features
module  native.simd

Functions

template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha1))
constexpr simd< std::uint32_t, 4, Arch > native::sha1c (simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
 Perform four SHA-1 rounds using choice; wk already includes the round constants.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha1) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha1c (simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha1))
constexpr simd< std::uint32_t, 4, Arch > native::sha1p (simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
 Perform four SHA-1 rounds using parity; wk already includes the round constants.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha1) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha1p (simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha1))
constexpr simd< std::uint32_t, 4, Arch > native::sha1m (simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
 Perform four SHA-1 rounds using majority; wk already includes the round constants.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha1) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha1m (simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch = NATIVE_BASELINE>
requires (Arch.has(arm_feature::sha1))
constexpr std::uint32_t native::sha1h (std::uint32_t a) noexcept
 Rotate a SHA-1 state word right by two bits; Arch defaults to the module baseline.
template<isa< arm > Arch = NATIVE_BASELINE>
requires (!Arch.has(arm_feature::sha1))
consteval std::uint32_t native::sha1h (std::uint32_t a) noexcept
 Evaluate the SHA-1 rotation at compile time without requiring SHA instructions.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha1))
constexpr simd< std::uint32_t, 4, Arch > native::sha1su0 (simd< std::uint32_t, 4, Arch > w0_3, simd< std::uint32_t, 4, Arch > w4_7, simd< std::uint32_t, 4, Arch > w8_11) noexcept
 Compute the first part of the SHA-1 schedule update for four consecutive words.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha1) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha1su0 (simd< std::uint32_t, 4, Arch > w0_3, simd< std::uint32_t, 4, Arch > w4_7, simd< std::uint32_t, 4, Arch > w8_11) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha1))
constexpr simd< std::uint32_t, 4, Arch > native::sha1su1 (simd< std::uint32_t, 4, Arch > partial, simd< std::uint32_t, 4, Arch > w12_15) noexcept
 Finish the four-word SHA-1 schedule update from sha1su0 and words 12 through 15.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha1) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha1su1 (simd< std::uint32_t, 4, Arch > partial, simd< std::uint32_t, 4, Arch > w12_15) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha2))
constexpr simd< std::uint32_t, 4, Arch > native::sha256h (simd< std::uint32_t, 4, Arch > abcd, simd< std::uint32_t, 4, Arch > efgh, simd< std::uint32_t, 4, Arch > wk) noexcept
 Return a,b,c,d after four SHA-256 rounds; wk includes round constants.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha2) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha256h (simd< std::uint32_t, 4, Arch > abcd, simd< std::uint32_t, 4, Arch > efgh, simd< std::uint32_t, 4, Arch > wk) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha2))
constexpr simd< std::uint32_t, 4, Arch > native::sha256h2 (simd< std::uint32_t, 4, Arch > efgh, simd< std::uint32_t, 4, Arch > abcd, simd< std::uint32_t, 4, Arch > wk) noexcept
 Return e,f,g,h after four SHA-256 rounds; abcd is the state before those rounds.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha2) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha256h2 (simd< std::uint32_t, 4, Arch > efgh, simd< std::uint32_t, 4, Arch > abcd, simd< std::uint32_t, 4, Arch > wk) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha2))
constexpr simd< std::uint32_t, 4, Arch > native::sha256su0 (simd< std::uint32_t, 4, Arch > w0_3, simd< std::uint32_t, 4, Arch > w4_7) noexcept
 Compute the first part of a four-word SHA-256 schedule update.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha2) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha256su0 (simd< std::uint32_t, 4, Arch > w0_3, simd< std::uint32_t, 4, Arch > w4_7) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha2))
constexpr simd< std::uint32_t, 4, Arch > native::sha256su1 (simd< std::uint32_t, 4, Arch > partial, simd< std::uint32_t, 4, Arch > w8_11, simd< std::uint32_t, 4, Arch > w12_15) noexcept
 Finish the four-word SHA-256 schedule update from sha256su0.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha2) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::sha256su1 (simd< std::uint32_t, 4, Arch > partial, simd< std::uint32_t, 4, Arch > w8_11, simd< std::uint32_t, 4, Arch > w12_15) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha512))
constexpr simd< std::uint64_t, 2, Arch > native::sha512h (simd< std::uint64_t, 2, Arch > sum, simd< std::uint64_t, 2, Arch > fg, simd< std::uint64_t, 2, Arch > de) noexcept
 Apply SHA512H to prepared round sums and packed f,g and d,e state.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha512) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::sha512h (simd< std::uint64_t, 2, Arch > sum, simd< std::uint64_t, 2, Arch > fg, simd< std::uint64_t, 2, Arch > de) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha512))
constexpr simd< std::uint64_t, 2, Arch > native::sha512h2 (simd< std::uint64_t, 2, Arch > sum_ab, simd< std::uint64_t, 2, Arch > c_, simd< std::uint64_t, 2, Arch > ab) noexcept
 Apply SHA512H2 to prepared sums, c, and the packed a,b state.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha512) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::sha512h2 (simd< std::uint64_t, 2, Arch > sum_ab, simd< std::uint64_t, 2, Arch > c_, simd< std::uint64_t, 2, Arch > ab) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha512))
constexpr simd< std::uint64_t, 2, Arch > native::sha512su0 (simd< std::uint64_t, 2, Arch > w0_1, simd< std::uint64_t, 2, Arch > w2_) noexcept
 Compute the first part of a two-word SHA-512 schedule update.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha512) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::sha512su0 (simd< std::uint64_t, 2, Arch > w0_1, simd< std::uint64_t, 2, Arch > w2_) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha512))
constexpr simd< std::uint64_t, 2, Arch > native::sha512su1 (simd< std::uint64_t, 2, Arch > partial, simd< std::uint64_t, 2, Arch > w14_15, simd< std::uint64_t, 2, Arch > w9_10) noexcept
 Finish the two-word SHA-512 schedule update from sha512su0.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha512) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::sha512su1 (simd< std::uint64_t, 2, Arch > partial, simd< std::uint64_t, 2, Arch > w14_15, simd< std::uint64_t, 2, Arch > w9_10) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint8_t, 16, Arch > native::eor3 (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint8_t, 16, Arch>); })
consteval simd< std::uint8_t, 16, Arch > native::eor3 (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint16_t, 8, Arch > native::eor3 (simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint16_t, 8, Arch>); })
consteval simd< std::uint16_t, 8, Arch > native::eor3 (simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint32_t, 4, Arch > native::eor3 (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::eor3 (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint64_t, 2, Arch > native::eor3 (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::eor3 (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int8_t, 16, Arch > native::eor3 (simd< std::int8_t, 16, Arch > a, simd< std::int8_t, 16, Arch > b, simd< std::int8_t, 16, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int8_t, 16, Arch>); })
consteval simd< std::int8_t, 16, Arch > native::eor3 (simd< std::int8_t, 16, Arch > a, simd< std::int8_t, 16, Arch > b, simd< std::int8_t, 16, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int16_t, 8, Arch > native::eor3 (simd< std::int16_t, 8, Arch > a, simd< std::int16_t, 8, Arch > b, simd< std::int16_t, 8, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int16_t, 8, Arch>); })
consteval simd< std::int16_t, 8, Arch > native::eor3 (simd< std::int16_t, 8, Arch > a, simd< std::int16_t, 8, Arch > b, simd< std::int16_t, 8, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int32_t, 4, Arch > native::eor3 (simd< std::int32_t, 4, Arch > a, simd< std::int32_t, 4, Arch > b, simd< std::int32_t, 4, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< std::int32_t, 4, Arch > native::eor3 (simd< std::int32_t, 4, Arch > a, simd< std::int32_t, 4, Arch > b, simd< std::int32_t, 4, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int64_t, 2, Arch > native::eor3 (simd< std::int64_t, 2, Arch > a, simd< std::int64_t, 2, Arch > b, simd< std::int64_t, 2, Arch > c) noexcept
 Return a XOR b XOR c for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< std::int64_t, 2, Arch > native::eor3 (simd< std::int64_t, 2, Arch > a, simd< std::int64_t, 2, Arch > b, simd< std::int64_t, 2, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint8_t, 16, Arch > native::bcax (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint8_t, 16, Arch>); })
consteval simd< std::uint8_t, 16, Arch > native::bcax (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint16_t, 8, Arch > native::bcax (simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint16_t, 8, Arch>); })
consteval simd< std::uint16_t, 8, Arch > native::bcax (simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint32_t, 4, Arch > native::bcax (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch > native::bcax (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint64_t, 2, Arch > native::bcax (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::bcax (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int8_t, 16, Arch > native::bcax (simd< std::int8_t, 16, Arch > a, simd< std::int8_t, 16, Arch > b, simd< std::int8_t, 16, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int8_t, 16, Arch>); })
consteval simd< std::int8_t, 16, Arch > native::bcax (simd< std::int8_t, 16, Arch > a, simd< std::int8_t, 16, Arch > b, simd< std::int8_t, 16, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int16_t, 8, Arch > native::bcax (simd< std::int16_t, 8, Arch > a, simd< std::int16_t, 8, Arch > b, simd< std::int16_t, 8, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int16_t, 8, Arch>); })
consteval simd< std::int16_t, 8, Arch > native::bcax (simd< std::int16_t, 8, Arch > a, simd< std::int16_t, 8, Arch > b, simd< std::int16_t, 8, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int32_t, 4, Arch > native::bcax (simd< std::int32_t, 4, Arch > a, simd< std::int32_t, 4, Arch > b, simd< std::int32_t, 4, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< std::int32_t, 4, Arch > native::bcax (simd< std::int32_t, 4, Arch > a, simd< std::int32_t, 4, Arch > b, simd< std::int32_t, 4, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::int64_t, 2, Arch > native::bcax (simd< std::int64_t, 2, Arch > a, simd< std::int64_t, 2, Arch > b, simd< std::int64_t, 2, Arch > c) noexcept
 Return a XOR (b AND NOT c) for every bit.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< std::int64_t, 2, Arch > native::bcax (simd< std::int64_t, 2, Arch > a, simd< std::int64_t, 2, Arch > b, simd< std::int64_t, 2, Arch > c) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch>
requires (Arch.has(arm_feature::sha3))
constexpr simd< std::uint64_t, 2, Arch > native::rax1 (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
 Return a XOR rotate_left(b, 1) in each 64-bit lane.
template<isa< arm > Arch>
requires (!Arch.has(arm_feature::sha3) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::rax1 (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch, unsigned Rotate>
requires (Arch.has(arm_feature::sha3) && Rotate < 64)
constexpr simd< std::uint64_t, 2, Arch > native::xar (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
 Rotate a XOR b right by Rotate bits in each 64-bit lane; Rotate is in [0, 63].
template<isa< arm > Arch, unsigned Rotate>
requires (!Arch.has(arm_feature::sha3) && Rotate < 64 && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch > native::xar (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
 Evaluate constant operands without the instruction feature.
template<isa< arm > Arch, class... T>
void native::sha1c (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha1p (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha1m (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch = NATIVE_BASELINE, class... T>
void native::sha1h (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha1su0 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha1su1 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha256h (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha256h2 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha256su0 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha256su1 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha512h (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha512h2 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha512su0 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::sha512su1 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::eor3 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::bcax (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, class... T>
void native::rax1 (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.
template<isa< arm > Arch, unsigned Rotate, class... T>
void native::xar (T...)=delete
 Reject unsupported argument shapes or unavailable instruction features.

Files

file  src/native.arm.sha.ccm