native.wasm.relaxed Module Reference

Exported Modules
module	native.wasm.features
module	native.simd

Functions
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint8_t, 16, Arch >	native::i8x16_relaxed_swizzle (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept
	Select bytes; out-of-range indices have relaxed semantics.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint8_t, 16, Arch>); })
consteval simd< std::uint8_t, 16, Arch >	native::i8x16_relaxed_swizzle (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::int32_t, 4, Arch >	native::i32x4_relaxed_trunc_f32x4 (simd< float, 4, Arch > a) noexcept
	Truncate toward zero; invalid lanes may differ from saturation.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< std::int32_t, 4, Arch >	native::i32x4_relaxed_trunc_f32x4 (simd< float, 4, Arch > a) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint32_t, 4, Arch >	native::u32x4_relaxed_trunc_f32x4 (simd< float, 4, Arch > a) noexcept
	Truncate toward zero; invalid lanes may differ from saturation.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch >	native::u32x4_relaxed_trunc_f32x4 (simd< float, 4, Arch > a) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::int32_t, 4, Arch >	native::i32x4_relaxed_trunc_f64x2_zero (simd< double, 2, Arch > a) noexcept
	Truncate toward zero; invalid lanes may differ from saturation.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< std::int32_t, 4, Arch >	native::i32x4_relaxed_trunc_f64x2_zero (simd< double, 2, Arch > a) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint32_t, 4, Arch >	native::u32x4_relaxed_trunc_f64x2_zero (simd< double, 2, Arch > a) noexcept
	Truncate toward zero; invalid lanes may differ from saturation.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch >	native::u32x4_relaxed_trunc_f64x2_zero (simd< double, 2, Arch > a) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< float, 4, Arch >	native::f32x4_relaxed_madd (simd< float, 4, Arch > a, simd< float, 4, Arch > b, simd< float, 4, Arch > c) noexcept
	Compute a * b + c with fused or separate rounding.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<float, 4, Arch>); })
consteval simd< float, 4, Arch >	native::f32x4_relaxed_madd (simd< float, 4, Arch > a, simd< float, 4, Arch > b, simd< float, 4, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< float, 4, Arch >	native::f32x4_relaxed_nmadd (simd< float, 4, Arch > a, simd< float, 4, Arch > b, simd< float, 4, Arch > c) noexcept
	Compute -(a * b) + c with fused or separate rounding.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<float, 4, Arch>); })
consteval simd< float, 4, Arch >	native::f32x4_relaxed_nmadd (simd< float, 4, Arch > a, simd< float, 4, Arch > b, simd< float, 4, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< double, 2, Arch >	native::f64x2_relaxed_madd (simd< double, 2, Arch > a, simd< double, 2, Arch > b, simd< double, 2, Arch > c) noexcept
	Compute a * b + c with fused or separate rounding.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<double, 2, Arch>); })
consteval simd< double, 2, Arch >	native::f64x2_relaxed_madd (simd< double, 2, Arch > a, simd< double, 2, Arch > b, simd< double, 2, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< double, 2, Arch >	native::f64x2_relaxed_nmadd (simd< double, 2, Arch > a, simd< double, 2, Arch > b, simd< double, 2, Arch > c) noexcept
	Compute -(a * b) + c with fused or separate rounding.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<double, 2, Arch>); })
consteval simd< double, 2, Arch >	native::f64x2_relaxed_nmadd (simd< double, 2, Arch > a, simd< double, 2, Arch > b, simd< double, 2, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint8_t, 16, Arch >	native::i8x16_relaxed_laneselect (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
	Select with mask c; partial masks permit bit or sign-bit lane selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint8_t, 16, Arch>); })
consteval simd< std::uint8_t, 16, Arch >	native::i8x16_relaxed_laneselect (simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint16_t, 8, Arch >	native::i16x8_relaxed_laneselect (simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > c) noexcept
	Select with mask c; partial masks permit bit or sign-bit lane selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint16_t, 8, Arch>); })
consteval simd< std::uint16_t, 8, Arch >	native::i16x8_relaxed_laneselect (simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint32_t, 4, Arch >	native::i32x4_relaxed_laneselect (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
	Select with mask c; partial masks permit bit or sign-bit lane selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint32_t, 4, Arch>); })
consteval simd< std::uint32_t, 4, Arch >	native::i32x4_relaxed_laneselect (simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::uint64_t, 2, Arch >	native::i64x2_relaxed_laneselect (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
	Select with mask c; partial masks permit bit or sign-bit lane selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::uint64_t, 2, Arch>); })
consteval simd< std::uint64_t, 2, Arch >	native::i64x2_relaxed_laneselect (simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< float, 4, Arch >	native::f32x4_relaxed_min (simd< float, 4, Arch > a, simd< float, 4, Arch > b) noexcept
	Minimum with relaxed NaN and signed-zero selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<float, 4, Arch>); })
consteval simd< float, 4, Arch >	native::f32x4_relaxed_min (simd< float, 4, Arch > a, simd< float, 4, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< float, 4, Arch >	native::f32x4_relaxed_max (simd< float, 4, Arch > a, simd< float, 4, Arch > b) noexcept
	Maximum with relaxed NaN and signed-zero selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<float, 4, Arch>); })
consteval simd< float, 4, Arch >	native::f32x4_relaxed_max (simd< float, 4, Arch > a, simd< float, 4, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< double, 2, Arch >	native::f64x2_relaxed_min (simd< double, 2, Arch > a, simd< double, 2, Arch > b) noexcept
	Minimum with relaxed NaN and signed-zero selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<double, 2, Arch>); })
consteval simd< double, 2, Arch >	native::f64x2_relaxed_min (simd< double, 2, Arch > a, simd< double, 2, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< double, 2, Arch >	native::f64x2_relaxed_max (simd< double, 2, Arch > a, simd< double, 2, Arch > b) noexcept
	Maximum with relaxed NaN and signed-zero selection.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<double, 2, Arch>); })
consteval simd< double, 2, Arch >	native::f64x2_relaxed_max (simd< double, 2, Arch > a, simd< double, 2, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::int16_t, 8, Arch >	native::i16x8_relaxed_q15mulr (simd< std::int16_t, 8, Arch > a, simd< std::int16_t, 8, Arch > b) noexcept
	Rounded Q15 product; the overflowing -32768 squared case is relaxed.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::int16_t, 8, Arch>); })
consteval simd< std::int16_t, 8, Arch >	native::i16x8_relaxed_q15mulr (simd< std::int16_t, 8, Arch > a, simd< std::int16_t, 8, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::int16_t, 8, Arch >	native::i16x8_relaxed_dot_i8x16_i7x16 (simd< std::int8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept
	Pairwise signed-byte dot product; high bits of b have relaxed semantics.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::int16_t, 8, Arch>); })
consteval simd< std::int16_t, 8, Arch >	native::i16x8_relaxed_dot_i8x16_i7x16 (simd< std::int8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.
template<isa< wasm > Arch> requires (Arch.has(wasm_feature::relaxed_simd))
constexpr simd< std::int32_t, 4, Arch >	native::i32x4_relaxed_dot_i8x16_i7x16_add (simd< std::int8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::int32_t, 4, Arch > c) noexcept
	Accumulate two adjacent relaxed dot pairs into c modulo 32 bits.
template<isa< wasm > Arch> requires (!Arch.has(wasm_feature::relaxed_simd) && requires { sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< std::int32_t, 4, Arch >	native::i32x4_relaxed_dot_i8x16_i7x16_add (simd< std::int8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::int32_t, 4, Arch > c) noexcept
	Evaluate constant operands without the relaxed SIMD instruction feature.

Files
file	src/native.wasm.relaxed.ccm