native.x86.f16c Module Reference

Exported Modules
module	native.x86.features
module	native.simd

Functions
template<isa< x86 > Arch, unsigned Imm8> requires (Arch.has(x86_feature::f16c) && Imm8 <= 255)
constexpr simd< fp16, 4, Arch >	native::cvtps_ph (simd< float, 4, Arch > a) noexcept
	Convert 4 binary32 lanes to 4 binary16 lanes.
template<isa< x86 > Arch, unsigned Imm8> requires (requires { sizeof(simd<float,4,Arch>); sizeof(simd<fp16,4,Arch>); } && !Arch.has(x86_feature::f16c) && Imm8 <= 255)
consteval simd< fp16, 4, Arch >	native::cvtps_ph (simd< float, 4, Arch > a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<isa< x86 > Arch, unsigned Imm8> requires (Arch.has(x86_feature::f16c) && Imm8 <= 255)
constexpr simd< fp16, 8, Arch >	native::cvtps_ph (simd< float, 8, Arch > a) noexcept
	Convert 8 binary32 lanes to 8 binary16 lanes.
template<isa< x86 > Arch, unsigned Imm8> requires (requires { sizeof(simd<float,8,Arch>); sizeof(simd<fp16,8,Arch>); } && !Arch.has(x86_feature::f16c) && Imm8 <= 255)
consteval simd< fp16, 8, Arch >	native::cvtps_ph (simd< float, 8, Arch > a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<isa< x86 > Arch, unsigned Lanes> requires (Arch.has(x86_feature::f16c) && Lanes == 4)
constexpr simd< float, 4, Arch >	native::cvtph_ps (simd< fp16, 4, Arch > a) noexcept
	Widen 4 binary16 lanes to 4 binary32 lanes.
template<isa< x86 > Arch, unsigned Lanes> requires (requires { sizeof(simd<float,4,Arch>); sizeof(simd<fp16,4,Arch>); } && !Arch.has(x86_feature::f16c) && Lanes == 4)
consteval simd< float, 4, Arch >	native::cvtph_ps (simd< fp16, 4, Arch > a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<isa< x86 > Arch, unsigned Lanes> requires (Arch.has(x86_feature::f16c) && Lanes == 8)
constexpr simd< float, 8, Arch >	native::cvtph_ps (simd< fp16, 8, Arch > a) noexcept
	Widen 8 binary16 lanes to 8 binary32 lanes.
template<isa< x86 > Arch, unsigned Lanes> requires (requires { sizeof(simd<float,8,Arch>); sizeof(simd<fp16,8,Arch>); } && !Arch.has(x86_feature::f16c) && Lanes == 8)
consteval simd< float, 8, Arch >	native::cvtph_ps (simd< fp16, 8, Arch > a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<isa< x86 > Arch, unsigned Imm8> requires (Arch.has(x86_feature::f16c) && Imm8 <= 255)
constexpr std::uint16_t	native::cvtss_sh (float a) noexcept
	Convert one binary32 value to binary16 representation bits.
template<isa< x86 > Arch, unsigned Imm8> requires (!Arch.has(x86_feature::f16c) && Imm8 <= 255)
consteval std::uint16_t	native::cvtss_sh (float a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<unsigned Imm8, isa< x86 > Arch = NATIVE_BASELINE> requires (Arch.has(x86_feature::f16c) && Imm8 <= 255)
constexpr std::uint16_t	native::cvtss_sh (float a) noexcept
template<unsigned Imm8, isa< x86 > Arch = NATIVE_BASELINE> requires (!Arch.has(x86_feature::f16c) && Imm8 <= 255)
consteval std::uint16_t	native::cvtss_sh (float a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<isa< x86 > Arch = NATIVE_BASELINE> requires (Arch.has(x86_feature::f16c))
constexpr float	native::cvtsh_ss (std::uint16_t a) noexcept
	Widen one binary16 representation to binary32.
template<isa< x86 > Arch = NATIVE_BASELINE> requires (!Arch.has(x86_feature::f16c))
consteval float	native::cvtsh_ss (std::uint16_t a) noexcept
	Constant-evaluation-only form for an ISA without F16C.
template<isa< x86 > Arch, unsigned Imm8, class V>
void	native::cvtps_ph (V)=delete
	Reject unsupported signatures, including implicit raw-register conversions.
template<isa< x86 > Arch, unsigned Lanes, class V>
void	native::cvtph_ps (V)=delete
	Reject unsupported signatures, including implicit raw-register conversions.

Files
file	src/native.x86.f16c.ccm