native.x86.memory Module Reference

Exported Modules
module	native.x86.features
module	native.simd

Functions
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4)
constexpr simd< float, 4, Arch >	native::vgatherdps (float const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 4, Arch >	native::mask_vgatherdps (simd< float, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, float const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 4, Arch >	native::mask_vgatherdps (simd< float, 4, Arch > source, predicate< 4, Arch > maskmask, float const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterdps (float *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< float, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 8)
constexpr simd< float, 8, Arch >	native::vgatherdps (float const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 8, Arch >	native::mask_vgatherdps (simd< float, 8, Arch > source, simd< std::int32_t, 8, Arch > maskmask, float const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 8, Arch >	native::mask_vgatherdps (simd< float, 8, Arch > source, predicate< 8, Arch > maskmask, float const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterdps (float *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< float, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 16, Arch >	native::mask_vgatherdps (simd< float, 16, Arch > source, predicate< 16, Arch > maskmask, float const *base, simd< std::int32_t, 16, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterdps (float *base, predicate< 16, Arch > maskmask, simd< std::int32_t, 16, Arch > indices, simd< float, 16, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::vpgatherdd (T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherdd (simd< T, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherdd (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr void	native::mask_vpscatterdd (T *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 8 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 8, Arch >	native::vpgatherdd (T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 8, Arch >	native::mask_vpgatherdd (simd< T, 8, Arch > source, simd< std::int32_t, 8, Arch > maskmask, T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 8, Arch >	native::mask_vpgatherdd (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr void	native::mask_vpscatterdd (T *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 16, Arch >	native::mask_vpgatherdd (simd< T, 16, Arch > source, predicate< 16, Arch > maskmask, T const *base, simd< std::int32_t, 16, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr void	native::mask_vpscatterdd (T *base, predicate< 16, Arch > maskmask, simd< std::int32_t, 16, Arch > indices, simd< T, 16, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2)
constexpr simd< double, 2, Arch >	native::vgatherdpd (double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 2, Arch >	native::mask_vgatherdpd (simd< double, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 2, Arch >	native::mask_vgatherdpd (simd< double, 2, Arch > source, predicate< 2, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterdpd (double *base, predicate< 2, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< double, 2, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4)
constexpr simd< double, 4, Arch >	native::vgatherdpd (double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 4, Arch >	native::mask_vgatherdpd (simd< double, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 4, Arch >	native::mask_vgatherdpd (simd< double, 4, Arch > source, predicate< 4, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterdpd (double *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< double, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 8, Arch >	native::mask_vgatherdpd (simd< double, 8, Arch > source, predicate< 8, Arch > maskmask, double const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterdpd (double *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< double, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 2, Arch >	native::vpgatherdq (T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 2, Arch >	native::mask_vpgatherdq (simd< T, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 2, Arch >	native::mask_vpgatherdq (simd< T, 2, Arch > source, predicate< 2, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr void	native::mask_vpscatterdq (T *base, predicate< 2, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< T, 2, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 4, Arch >	native::vpgatherdq (T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherdq (simd< T, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherdq (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr void	native::mask_vpscatterdq (T *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 8, Arch >	native::mask_vpgatherdq (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr void	native::mask_vpscatterdq (T *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4)
constexpr simd< float, 4, Arch >	native::vgatherqps (float const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, float const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, predicate< 4, Arch > maskmask, float const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterqps (float *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< float, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4)
constexpr simd< float, 4, Arch >	native::vgatherqps (float const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, float const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, predicate< 4, Arch > maskmask, float const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterqps (float *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< float, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< float, 8, Arch >	native::mask_vgatherqps (simd< float, 8, Arch > source, predicate< 8, Arch > maskmask, float const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterqps (float *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< float, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::vpgatherqd (T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr void	native::mask_vpscatterqd (T *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< T, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::vpgatherqd (T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr void	native::mask_vpscatterqd (T *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr simd< T, 8, Arch >	native::mask_vpgatherqd (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>))
constexpr void	native::mask_vpscatterqd (T *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2)
constexpr simd< double, 2, Arch >	native::vgatherqpd (double const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 2, Arch >	native::mask_vgatherqpd (simd< double, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, double const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 2, Arch >	native::mask_vgatherqpd (simd< double, 2, Arch > source, predicate< 2, Arch > maskmask, double const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterqpd (double *base, predicate< 2, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< double, 2, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4)
constexpr simd< double, 4, Arch >	native::vgatherqpd (double const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 4, Arch >	native::mask_vgatherqpd (simd< double, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, double const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 4, Arch >	native::mask_vgatherqpd (simd< double, 4, Arch > source, predicate< 4, Arch > maskmask, double const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterqpd (double *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< double, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr simd< double, 8, Arch >	native::mask_vgatherqpd (simd< double, 8, Arch > source, predicate< 8, Arch > maskmask, double const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8))
constexpr void	native::mask_vscatterqpd (double *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< double, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 2, Arch >	native::vpgatherqq (T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 2, Arch >	native::mask_vpgatherqq (simd< T, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 2, Arch >	native::mask_vpgatherqq (simd< T, 2, Arch > source, predicate< 2, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr void	native::mask_vpscatterqq (T *base, predicate< 2, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< T, 2, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 4, Arch >	native::vpgatherqq (T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather all addressable lanes; N specifies the result lane count.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx2) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherqq (simd< T, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather lanes whose full vector mask has its sign bit set; retain source otherwise.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 4, Arch >	native::mask_vpgatherqq (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr void	native::mask_vpscatterqq (T *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr simd< T, 8, Arch >	native::mask_vpgatherqq (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Gather predicate-selected lanes; retain source in inactive addressable lanes.
template<int Scale, isa< x86 > Arch, class T> requires (Arch.has(x86_feature::avx512f) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>))
constexpr void	native::mask_vpscatterqq (T *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Store predicate-selected lanes; inactive addresses are not accessed.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && requires { sizeof(simd <float, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< float, 4, Arch >	native::vgatherdps (float const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< float, 4, Arch >	native::mask_vgatherdps (simd< float, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, float const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< float, 4, Arch >	native::mask_vgatherdps (simd< float, 4, Arch > source, predicate< 4, Arch > maskmask, float const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval void	native::mask_vscatterdps (float *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< float, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 8 && requires { sizeof(simd <float, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< float, 8, Arch >	native::vgatherdps (float const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< float, 8, Arch >	native::mask_vgatherdps (simd< float, 8, Arch > source, simd< std::int32_t, 8, Arch > maskmask, float const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< float, 8, Arch >	native::mask_vgatherdps (simd< float, 8, Arch > source, predicate< 8, Arch > maskmask, float const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval void	native::mask_vscatterdps (float *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< float, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 16, Arch>); sizeof(simd<std::int32_t, 16, Arch>); })
consteval simd< float, 16, Arch >	native::mask_vgatherdps (simd< float, 16, Arch > source, predicate< 16, Arch > maskmask, float const *base, simd< std::int32_t, 16, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 16, Arch>); sizeof(simd<std::int32_t, 16, Arch>); })
consteval void	native::mask_vscatterdps (float *base, predicate< 16, Arch > maskmask, simd< std::int32_t, 16, Arch > indices, simd< float, 16, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::vpgatherdd (T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherdd (simd< T, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherdd (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int32_t, 4, Arch>); })
consteval void	native::mask_vpscatterdd (T *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 8 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< T, 8, Arch >	native::vpgatherdd (T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< T, 8, Arch >	native::mask_vpgatherdd (simd< T, 8, Arch > source, simd< std::int32_t, 8, Arch > maskmask, T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 8, Arch> ); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< T, 8, Arch >	native::mask_vpgatherdd (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 8, Arch> ); sizeof(simd<std::int32_t, 8, Arch>); })
consteval void	native::mask_vpscatterdd (T *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 16, Arch>); sizeof(simd<std::int32_t, 16, Arch>); })
consteval simd< T, 16, Arch >	native::mask_vpgatherdd (simd< T, 16, Arch > source, predicate< 16, Arch > maskmask, T const *base, simd< std::int32_t, 16, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 16, Arch>); sizeof(simd<std::int32_t, 16, Arch>); })
consteval void	native::mask_vpscatterdd (T *base, predicate< 16, Arch > maskmask, simd< std::int32_t, 16, Arch > indices, simd< T, 16, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2 && requires { sizeof(simd <double, 2, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< double, 2, Arch >	native::vgatherdpd (double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 2, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< double, 2, Arch >	native::mask_vgatherdpd (simd< double, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 2, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< double, 2, Arch >	native::mask_vgatherdpd (simd< double, 2, Arch > source, predicate< 2, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 2, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval void	native::mask_vscatterdpd (double *base, predicate< 2, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< double, 2, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && requires { sizeof(simd <double, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< double, 4, Arch >	native::vgatherdpd (double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< double, 4, Arch >	native::mask_vgatherdpd (simd< double, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< double, 4, Arch >	native::mask_vgatherdpd (simd< double, 4, Arch > source, predicate< 4, Arch > maskmask, double const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval void	native::mask_vscatterdpd (double *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< double, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< double, 8, Arch >	native::mask_vgatherdpd (simd< double, 8, Arch > source, predicate< 8, Arch > maskmask, double const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval void	native::mask_vscatterdpd (double *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< double, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 2, Arch >	native::vpgatherdq (T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 2, Arch >	native::mask_vpgatherdq (simd< T, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch> ); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 2, Arch >	native::mask_vpgatherdq (simd< T, 2, Arch > source, predicate< 2, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch> ); sizeof(simd<std::int32_t, 4, Arch>); })
consteval void	native::mask_vpscatterdq (T *base, predicate< 2, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< T, 2, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::vpgatherdq (T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherdq (simd< T, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int32_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherdq (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int32_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int32_t, 4, Arch>); })
consteval void	native::mask_vpscatterdq (T *base, predicate< 4, Arch > maskmask, simd< std::int32_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval simd< T, 8, Arch >	native::mask_vpgatherdq (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int32_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int32_t, 8, Arch>); })
consteval void	native::mask_vpscatterdq (T *base, predicate< 8, Arch > maskmask, simd< std::int32_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && requires { sizeof(simd <float, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< float, 4, Arch >	native::vgatherqps (float const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, float const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, predicate< 4, Arch > maskmask, float const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval void	native::mask_vscatterqps (float *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< float, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && requires { sizeof(simd <float, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< float, 4, Arch >	native::vgatherqps (float const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, float const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< float, 4, Arch >	native::mask_vgatherqps (simd< float, 4, Arch > source, predicate< 4, Arch > maskmask, float const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<float, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval void	native::mask_vscatterqps (float *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< float, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval simd< float, 8, Arch >	native::mask_vgatherqps (simd< float, 8, Arch > source, predicate< 8, Arch > maskmask, float const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <float, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval void	native::mask_vscatterqps (float *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< float, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 4, Arch >	native::vpgatherqd (T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int64_t, 2, Arch>); })
consteval void	native::mask_vpscatterqd (T *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< T, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::vpgatherqd (T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, simd< std::int32_t, 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherqd (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int64_t, 4, Arch>); })
consteval void	native::mask_vpscatterqd (T *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval simd< T, 8, Arch >	native::mask_vpgatherqd (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int32_t> || std::same_as<T, std::uint32_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval void	native::mask_vpscatterqd (T *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2 && requires { sizeof(simd <double, 2, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< double, 2, Arch >	native::vgatherqpd (double const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 2, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< double, 2, Arch >	native::mask_vgatherqpd (simd< double, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, double const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 2, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< double, 2, Arch >	native::mask_vgatherqpd (simd< double, 2, Arch > source, predicate< 2, Arch > maskmask, double const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 2, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval void	native::mask_vscatterqpd (double *base, predicate< 2, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< double, 2, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && requires { sizeof(simd <double, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< double, 4, Arch >	native::vgatherqpd (double const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< double, 4, Arch >	native::mask_vgatherqpd (simd< double, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, double const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< double, 4, Arch >	native::mask_vgatherqpd (simd< double, 4, Arch > source, predicate< 4, Arch > maskmask, double const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd<double, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval void	native::mask_vscatterqpd (double *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< double, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval simd< double, 8, Arch >	native::mask_vgatherqpd (simd< double, 8, Arch > source, predicate< 8, Arch > maskmask, double const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && requires { sizeof(simd <double, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval void	native::mask_vscatterqpd (double *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< double, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 2 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 2, Arch >	native::vpgatherqq (T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch>); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 2, Arch >	native::mask_vpgatherqq (simd< T, 2, Arch > source, simd< std::int64_t, 2, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch> ); sizeof(simd<std::int64_t, 2, Arch>); })
consteval simd< T, 2, Arch >	native::mask_vpgatherqq (simd< T, 2, Arch > source, predicate< 2, Arch > maskmask, T const *base, simd< std::int64_t, 2, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 2, Arch> ); sizeof(simd<std::int64_t, 2, Arch>); })
consteval void	native::mask_vpscatterqq (T *base, predicate< 2, Arch > maskmask, simd< std::int64_t, 2, Arch > indices, simd< T, 2, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, std::size_t N, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && N == 4 && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::vpgatherqq (T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx2)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch>); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherqq (simd< T, 4, Arch > source, simd< std::int64_t, 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int64_t, 4, Arch>); })
consteval simd< T, 4, Arch >	native::mask_vpgatherqq (simd< T, 4, Arch > source, predicate< 4, Arch > maskmask, T const *base, simd< std::int64_t, 4, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vl)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 4, Arch> ); sizeof(simd<std::int64_t, 4, Arch>); })
consteval void	native::mask_vpscatterqq (T *base, predicate< 4, Arch > maskmask, simd< std::int64_t, 4, Arch > indices, simd< T, 4, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval simd< T, 8, Arch >	native::mask_vpgatherqq (simd< T, 8, Arch > source, predicate< 8, Arch > maskmask, T const *base, simd< std::int64_t, 8, Arch > indices) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.
template<int Scale, isa< x86 > Arch, class T> requires (!(Arch.has(x86_feature::avx512f)) && (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8) && (std::same_as<T, std::int64_t> || std::same_as<T, std::uint64_t>) && requires { sizeof(simd<T, 8, Arch>); sizeof(simd<std::int64_t, 8, Arch>); })
consteval void	native::mask_vpscatterqq (T *base, predicate< 8, Arch > maskmask, simd< std::int64_t, 8, Arch > indices, simd< T, 8, Arch > value) noexcept
	Evaluate this hardware shape only at compile time when its storage is available.

Files
file	src/native.x86.memory.ccm