|
native 0.0.1
Vectors, masks and wide register packs for C++26
|
Exported Modules | |
| module | native.x86.features |
| module | native.simd |
Functions | |
|
template<isa< x86 > Arch> requires (Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx)) | |
| constexpr simd< std::uint64_t, 4, Arch > | native::sha512msg1 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept |
| First SHA-512 schedule step; only the low lane of b is used. | |
|
template<isa< x86 > Arch> requires (!(Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx)) && requires { sizeof(simd<std::uint64_t, 2, Arch> ); sizeof(simd<std::uint64_t, 4, Arch>); }) | |
| consteval simd< std::uint64_t, 4, Arch > | native::sha512msg1 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept |
| Evaluate constant operands without SHA512. | |
|
template<isa< x86 > Arch> requires (Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx)) | |
| constexpr simd< std::uint64_t, 4, Arch > | native::sha512msg2 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 4, Arch > b) noexcept |
| Final SHA-512 schedule step with recurrence through the low output lanes. | |
|
template<isa< x86 > Arch> requires (!(Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx)) && requires { sizeof(simd<std::uint64_t, 4, Arch>); }) | |
| consteval simd< std::uint64_t, 4, Arch > | native::sha512msg2 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 4, Arch > b) noexcept |
| Evaluate constant operands without SHA512. | |
|
template<isa< x86 > Arch> requires (Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx)) | |
| constexpr simd< std::uint64_t, 4, Arch > | native::sha512rnds2 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 4, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept |
| Two SHA-512 rounds: a is CDGH, b is ABEF, c contains two message-plus-constant words. | |
|
template<isa< x86 > Arch> requires (!(Arch.has(x86_feature::sha512) && Arch.has(x86_feature::avx)) && requires { sizeof(simd<std::uint64_t, 2, Arch> ); sizeof(simd<std::uint64_t, 4, Arch>); }) | |
| consteval simd< std::uint64_t, 4, Arch > | native::sha512rnds2 (simd< std::uint64_t, 4, Arch > a, simd< std::uint64_t, 4, Arch > b, simd< std::uint64_t, 2, Arch > c) noexcept |
| Evaluate constant operands without SHA512. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::sha512msg1 (Args...)=delete |
| Reject raw registers, mixed requirements and unsupported shapes. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::sha512msg2 (Args...)=delete |
| Reject raw registers, mixed requirements and unsupported shapes. | |
| template<isa< x86 > Arch, class... Args> | |
| void | native::sha512rnds2 (Args...)=delete |
| Reject raw registers, mixed requirements and unsupported shapes. | |
Files | |
| file | src/native.x86.sha512.ccm |