native.x86.vnni.ccm

// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
module;
#include "native/isa_import.h"
#include "native/x86/vnni.h"
#include "native/x86/integer_constant.h"
export module native.x86.vnni;
export import native.x86.features;
export import native.simd;
// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
#if NATIVE_HOST_X86 || defined(NATIVE_DOXYGEN)
export namespace native {
 
  // 128-bit core operations.
  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 4, Arch> dpbusd(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> dpbusd(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> mask_dpbusd(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::mask_dpbusd<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> maskz_dpbusd(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::maskz_dpbusd<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 4, Arch> dpbusds(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> dpbusds(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> mask_dpbusds(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::mask_dpbusds<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> maskz_dpbusds(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::maskz_dpbusds<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 4, Arch> dpwssd(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> dpwssd(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> mask_dpwssd(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::mask_dpwssd<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> maskz_dpwssd(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::maskz_dpwssd<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 4, Arch> dpwssds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> dpwssds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> mask_dpwssds(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::mask_dpwssds<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 4, Arch> maskz_dpwssds(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::maskz_dpwssds<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }
 
  // 256-bit core operations.
  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 8, Arch> dpbusd(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> dpbusd(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> mask_dpbusd(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::mask_dpbusd<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> maskz_dpbusd(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::maskz_dpbusd<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 8, Arch> dpbusds(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> dpbusds(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> mask_dpbusds(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::mask_dpbusds<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> maskz_dpbusds(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::maskz_dpbusds<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 8, Arch> dpwssd(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> dpwssd(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> mask_dpwssd(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::mask_dpwssd<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> maskz_dpwssd(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::maskz_dpwssd<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnni))
  native_nodiscard native_inline native_const native_target("avxvnni")
  constexpr simd<std::int32_t, 8, Arch> dpwssds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> dpwssds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> mask_dpwssds(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::mask_dpwssds<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni,avx512vl")
  constexpr simd<std::int32_t, 8, Arch> maskz_dpwssds(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::maskz_dpwssds<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }
 
  // 512-bit core operations.
  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> dpbusd(simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::dpbusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> mask_dpbusd(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::mask_dpbusd<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> maskz_dpbusd(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::maskz_dpbusd<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> dpbusds(simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::dpbusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> mask_dpbusds(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::mask_dpbusds<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> maskz_dpbusds(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::maskz_dpbusds<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> dpwssd(simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::dpwssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> mask_dpwssd(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::mask_dpwssd<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> maskz_dpwssd(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::maskz_dpwssd<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> dpwssds(simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::dpwssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> mask_dpwssds(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::mask_dpwssds<Arch>(accumulator.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))
  native_nodiscard native_inline native_const native_target("avx512f,avx512vnni")
  constexpr simd<std::int32_t, 16, Arch> maskz_dpwssds(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true); }
    else {
      return simd<std::int32_t, 16, Arch>::from_native(detail::x86_vnni::maskz_dpwssds<Arch>(mask.to_bitset(), accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 4, Arch> dpbssd(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 8, Arch> dpbssd(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbssd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 4, Arch> dpbssds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 8, Arch> dpbssds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbssds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 4, Arch> dpbsud(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbsud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 8, Arch> dpbsud(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbsud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 4, Arch> dpbsuds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpbsuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::int32_t, 8, Arch> dpbsuds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpbsuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::uint32_t, 4, Arch> dpbuud(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 4, Arch>::from_native(detail::x86_vnni::dpbuud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::uint32_t, 8, Arch> dpbuud(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 8, Arch>::from_native(detail::x86_vnni::dpbuud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::uint32_t, 4, Arch> dpbuuds(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 4, Arch>::from_native(detail::x86_vnni::dpbuuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint8))
  native_nodiscard native_inline native_const native_target("avxvnniint8")
  constexpr simd<std::uint32_t, 8, Arch> dpbuuds(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 8, Arch>::from_native(detail::x86_vnni::dpbuuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 4, Arch> dpwsud(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwsud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 8, Arch> dpwsud(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwsud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 4, Arch> dpwsuds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwsuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 8, Arch> dpwsuds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwsuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 4, Arch> dpwusd(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 8, Arch> dpwusd(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwusd<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 4, Arch> dpwusds(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 4, Arch>::from_native(detail::x86_vnni::dpwusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::int32_t, 8, Arch> dpwusds(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::int32_t, 8, Arch>::from_native(detail::x86_vnni::dpwusds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::uint32_t, 4, Arch> dpwuud(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 4, Arch>::from_native(detail::x86_vnni::dpwuud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::uint32_t, 8, Arch> dpwuud(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 8, Arch>::from_native(detail::x86_vnni::dpwuud<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::uint32_t, 4, Arch> dpwuuds(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 4, Arch>::from_native(detail::x86_vnni::dpwuuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(Arch.has(x86_feature::avxvnniint16))
  native_nodiscard native_inline native_const native_target("avxvnniint16")
  constexpr simd<std::uint32_t, 8, Arch> dpwuuds(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    if consteval { return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false); }
    else {
      return simd<std::uint32_t, 8, Arch>::from_native(detail::x86_vnni::dpwuuds<Arch>(accumulator.to_native(), a.to_native(), b.to_native()));
    }
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpbusd(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> mask_dpbusd(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> maskz_dpbusd(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpbusds(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> mask_dpbusds(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> maskz_dpbusds(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpwssd(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> mask_dpwssd(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> maskz_dpwssd(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpwssds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> mask_dpwssds(simd<std::int32_t, 4, Arch> accumulator, predicate<4, Arch> mask, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> maskz_dpwssds(predicate<4, Arch> mask, simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpbusd(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> mask_dpbusd(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> maskz_dpbusd(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpbusds(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> mask_dpbusds(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> maskz_dpbusds(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpwssd(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> mask_dpwssd(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> maskz_dpwssd(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnni)) || (!Arch.has(x86_feature::avxvnni) &&
      Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) && Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpwssds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> mask_dpwssds(simd<std::int32_t, 8, Arch> accumulator, predicate<8, Arch> mask, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni) &&
      Arch.has(x86_feature::avx512vl))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> maskz_dpwssds(predicate<8, Arch> mask, simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::uint8_t, 64, Arch>); sizeof(simd<std::int8_t, 64, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> dpbusd(simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::uint8_t, 64, Arch>); sizeof(simd<std::int8_t, 64, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> mask_dpbusd(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::uint8_t, 64, Arch>); sizeof(simd<std::int8_t, 64, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> maskz_dpbusd(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::uint8_t, 64, Arch>); sizeof(simd<std::int8_t, 64, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> dpbusds(simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::uint8_t, 64, Arch>); sizeof(simd<std::int8_t, 64, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> mask_dpbusds(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::uint8_t, 64, Arch>); sizeof(simd<std::int8_t, 64, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> maskz_dpbusds(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::uint8_t, 64, Arch> a, simd<std::int8_t, 64, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::int16_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> dpwssd(simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::int16_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> mask_dpwssd(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::int16_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> maskz_dpwssd(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::int16_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> dpwssds(simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::int16_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> mask_dpwssds(simd<std::int32_t, 16, Arch> accumulator, predicate<16, Arch> mask, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avx512f) && Arch.has(x86_feature::avx512vnni))) &&
      requires { sizeof(simd<std::int32_t, 16, Arch>); sizeof(simd<std::int16_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 16, Arch> maskz_dpwssds(predicate<16, Arch> mask, simd<std::int32_t, 16, Arch> accumulator, simd<std::int16_t, 32, Arch> a, simd<std::int16_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, mask.to_bitset(), true);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpbssd(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpbssd(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpbssds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::int8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpbssds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::int8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int8_t, 16, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpbsud(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int8_t, 32, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpbsud(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int8_t, 16, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpbsuds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int8_t, 32, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpbsuds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::uint32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 4, Arch> dpbuud(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::uint32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 8, Arch> dpbuud(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::uint32_t, 4, Arch>); sizeof(simd<std::uint8_t, 16, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 4, Arch> dpbuuds(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint8_t, 16, Arch> a, simd<std::uint8_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint8))) &&
      requires { sizeof(simd<std::uint32_t, 8, Arch>); sizeof(simd<std::uint8_t, 32, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 8, Arch> dpbuuds(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint8_t, 32, Arch> a, simd<std::uint8_t, 32, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); sizeof(simd<std::uint16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpwsud(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); sizeof(simd<std::uint16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpwsud(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::int16_t, 8, Arch>); sizeof(simd<std::uint16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpwsuds(simd<std::int32_t, 4, Arch> accumulator, simd<std::int16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::int16_t, 16, Arch>); sizeof(simd<std::uint16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpwsuds(simd<std::int32_t, 8, Arch> accumulator, simd<std::int16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint16_t, 8, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpwusd(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint16_t, 16, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpwusd(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 4, Arch>); sizeof(simd<std::uint16_t, 8, Arch>); sizeof(simd<std::int16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 4, Arch> dpwusds(simd<std::int32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::int16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::int32_t, 8, Arch>); sizeof(simd<std::uint16_t, 16, Arch>); sizeof(simd<std::int16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::int32_t, 8, Arch> dpwusds(simd<std::int32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::int16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::uint32_t, 4, Arch>); sizeof(simd<std::uint16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 4, Arch> dpwuud(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::uint32_t, 8, Arch>); sizeof(simd<std::uint16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 8, Arch> dpwuud(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<false>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::uint32_t, 4, Arch>); sizeof(simd<std::uint16_t, 8, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 4, Arch> dpwuuds(simd<std::uint32_t, 4, Arch> accumulator, simd<std::uint16_t, 8, Arch> a, simd<std::uint16_t, 8, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }

  template<isa<x86> Arch> requires(!((Arch.has(x86_feature::avxvnniint16))) &&
      requires { sizeof(simd<std::uint32_t, 8, Arch>); sizeof(simd<std::uint16_t, 16, Arch>); })
  native_nodiscard consteval simd<std::uint32_t, 8, Arch> dpwuuds(simd<std::uint32_t, 8, Arch> accumulator, simd<std::uint16_t, 16, Arch> a, simd<std::uint16_t, 16, Arch> b) noexcept {
    return detail::x86_instruction_constant::dot<true>(accumulator, a, b, ~std::uint64_t{0}, false);
  }
 
  // Reject implicit register conversions, mixed tags and wrong element types.
  template<isa<x86> Arch, class... Args>
  void dpbusd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void mask_dpbusd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void maskz_dpbusd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbusds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void mask_dpbusds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void maskz_dpbusds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwssd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void mask_dpwssd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void maskz_dpwssd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwssds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void mask_dpwssds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void maskz_dpwssds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbssd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbssds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbsud(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbsuds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbuud(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpbuuds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwsud(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwsuds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwusd(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwusds(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwuud(Args...) = delete;
  template<isa<x86> Arch, class... Args>
  void dpwuuds(Args...) = delete;

 
}
#endif