native 0.0.1
Vectors, masks and wide register packs for C++26
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native.x86.avx512cd.ccm
1// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
2module;
3#include "native/isa_import.h"
4#include "native/x86/avx512cd.h"
5export module native.x86.avx512cd;
6export import native.x86.features;
7export import native.simd;
8// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
9
10#if NATIVE_HOST_X86 || defined(NATIVE_DOXYGEN)
11export namespace native {
22
24 template<isa<x86> Arch>
25 requires(Arch.has(x86_feature::avx512f) &&
26 Arch.has(x86_feature::avx512cd) &&
27 Arch.has(x86_feature::avx512vl))
28 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
29 constexpr simd<std::uint32_t, 4, Arch> vpconflictd(simd<std::uint32_t, 4, Arch> value) noexcept {
30 if consteval {
31 return detail::x86_avx512cd_constant::evaluate<true>(
32 value, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
33 } else {
34 return simd<std::uint32_t, 4, Arch>::from_native(
35 detail::x86_avx512cd::vpconflictd<Arch>(value.to_native()));
36 }
37 }
38
40 template<isa<x86> Arch>
41 requires(Arch.has(x86_feature::avx512f) &&
42 Arch.has(x86_feature::avx512cd) &&
43 Arch.has(x86_feature::avx512vl))
44 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
45 constexpr simd<std::uint32_t, 4, Arch> mask_vpconflictd(
46 simd<std::uint32_t, 4, Arch> source,
47 predicate<4, Arch> mask,
48 simd<std::uint32_t, 4, Arch> value) noexcept {
49 if consteval {
50 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
51 } else {
52 return simd<std::uint32_t, 4, Arch>::from_native(
53 detail::x86_avx512cd::mask_vpconflictd<Arch>(
54 source.to_native(), mask.to_bitset(), value.to_native()));
55 }
56 }
57
59 template<isa<x86> Arch>
60 requires(Arch.has(x86_feature::avx512f) &&
61 Arch.has(x86_feature::avx512cd) &&
62 Arch.has(x86_feature::avx512vl))
63 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
64 constexpr simd<std::uint32_t, 4, Arch> maskz_vpconflictd(
65 predicate<4, Arch> mask,
66 simd<std::uint32_t, 4, Arch> value) noexcept {
67 if consteval {
68 return detail::x86_avx512cd_constant::evaluate<true>(
69 value, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
70 } else {
71 return simd<std::uint32_t, 4, Arch>::from_native(
72 detail::x86_avx512cd::maskz_vpconflictd<Arch>(
73 mask.to_bitset(), value.to_native()));
74 }
75 }
76
78 template<isa<x86> Arch>
79 requires(Arch.has(x86_feature::avx512f) &&
80 Arch.has(x86_feature::avx512cd) &&
81 Arch.has(x86_feature::avx512vl))
82 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
83 constexpr simd<std::uint32_t, 4, Arch> vplzcntd(simd<std::uint32_t, 4, Arch> value) noexcept {
84 if consteval {
85 return detail::x86_avx512cd_constant::evaluate<false>(
86 value, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
87 } else {
88 return simd<std::uint32_t, 4, Arch>::from_native(
89 detail::x86_avx512cd::vplzcntd<Arch>(value.to_native()));
90 }
91 }
92
94 template<isa<x86> Arch>
95 requires(Arch.has(x86_feature::avx512f) &&
96 Arch.has(x86_feature::avx512cd) &&
97 Arch.has(x86_feature::avx512vl))
98 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
99 constexpr simd<std::uint32_t, 4, Arch> mask_vplzcntd(
100 simd<std::uint32_t, 4, Arch> source,
101 predicate<4, Arch> mask,
102 simd<std::uint32_t, 4, Arch> value) noexcept {
103 if consteval {
104 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
105 } else {
106 return simd<std::uint32_t, 4, Arch>::from_native(
107 detail::x86_avx512cd::mask_vplzcntd<Arch>(
108 source.to_native(), mask.to_bitset(), value.to_native()));
109 }
110 }
111
113 template<isa<x86> Arch>
114 requires(Arch.has(x86_feature::avx512f) &&
115 Arch.has(x86_feature::avx512cd) &&
116 Arch.has(x86_feature::avx512vl))
117 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
118 constexpr simd<std::uint32_t, 4, Arch> maskz_vplzcntd(
119 predicate<4, Arch> mask,
120 simd<std::uint32_t, 4, Arch> value) noexcept {
121 if consteval {
122 return detail::x86_avx512cd_constant::evaluate<false>(
123 value, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
124 } else {
125 return simd<std::uint32_t, 4, Arch>::from_native(
126 detail::x86_avx512cd::maskz_vplzcntd<Arch>(
127 mask.to_bitset(), value.to_native()));
128 }
129 }
130
132 template<isa<x86> Arch>
133 requires(Arch.has(x86_feature::avx512f) &&
134 Arch.has(x86_feature::avx512cd) &&
135 Arch.has(x86_feature::avx512vl))
136 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
137 constexpr simd<std::uint64_t, 2, Arch> vpconflictq(simd<std::uint64_t, 2, Arch> value) noexcept {
138 if consteval {
139 return detail::x86_avx512cd_constant::evaluate<true>(
140 value, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
141 } else {
142 return simd<std::uint64_t, 2, Arch>::from_native(
143 detail::x86_avx512cd::vpconflictq<Arch>(value.to_native()));
144 }
145 }
146
148 template<isa<x86> Arch>
149 requires(Arch.has(x86_feature::avx512f) &&
150 Arch.has(x86_feature::avx512cd) &&
151 Arch.has(x86_feature::avx512vl))
152 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
153 constexpr simd<std::uint64_t, 2, Arch> mask_vpconflictq(
154 simd<std::uint64_t, 2, Arch> source,
155 predicate<2, Arch> mask,
156 simd<std::uint64_t, 2, Arch> value) noexcept {
157 if consteval {
158 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
159 } else {
160 return simd<std::uint64_t, 2, Arch>::from_native(
161 detail::x86_avx512cd::mask_vpconflictq<Arch>(
162 source.to_native(), mask.to_bitset(), value.to_native()));
163 }
164 }
165
167 template<isa<x86> Arch>
168 requires(Arch.has(x86_feature::avx512f) &&
169 Arch.has(x86_feature::avx512cd) &&
170 Arch.has(x86_feature::avx512vl))
171 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
172 constexpr simd<std::uint64_t, 2, Arch> maskz_vpconflictq(
173 predicate<2, Arch> mask,
174 simd<std::uint64_t, 2, Arch> value) noexcept {
175 if consteval {
176 return detail::x86_avx512cd_constant::evaluate<true>(
177 value, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
178 } else {
179 return simd<std::uint64_t, 2, Arch>::from_native(
180 detail::x86_avx512cd::maskz_vpconflictq<Arch>(
181 mask.to_bitset(), value.to_native()));
182 }
183 }
184
186 template<isa<x86> Arch>
187 requires(Arch.has(x86_feature::avx512f) &&
188 Arch.has(x86_feature::avx512cd) &&
189 Arch.has(x86_feature::avx512vl))
190 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
191 constexpr simd<std::uint64_t, 2, Arch> vplzcntq(simd<std::uint64_t, 2, Arch> value) noexcept {
192 if consteval {
193 return detail::x86_avx512cd_constant::evaluate<false>(
194 value, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
195 } else {
196 return simd<std::uint64_t, 2, Arch>::from_native(
197 detail::x86_avx512cd::vplzcntq<Arch>(value.to_native()));
198 }
199 }
200
202 template<isa<x86> Arch>
203 requires(Arch.has(x86_feature::avx512f) &&
204 Arch.has(x86_feature::avx512cd) &&
205 Arch.has(x86_feature::avx512vl))
206 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
207 constexpr simd<std::uint64_t, 2, Arch> mask_vplzcntq(
208 simd<std::uint64_t, 2, Arch> source,
209 predicate<2, Arch> mask,
210 simd<std::uint64_t, 2, Arch> value) noexcept {
211 if consteval {
212 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
213 } else {
214 return simd<std::uint64_t, 2, Arch>::from_native(
215 detail::x86_avx512cd::mask_vplzcntq<Arch>(
216 source.to_native(), mask.to_bitset(), value.to_native()));
217 }
218 }
219
221 template<isa<x86> Arch>
222 requires(Arch.has(x86_feature::avx512f) &&
223 Arch.has(x86_feature::avx512cd) &&
224 Arch.has(x86_feature::avx512vl))
225 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
226 constexpr simd<std::uint64_t, 2, Arch> maskz_vplzcntq(
227 predicate<2, Arch> mask,
228 simd<std::uint64_t, 2, Arch> value) noexcept {
229 if consteval {
230 return detail::x86_avx512cd_constant::evaluate<false>(
231 value, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
232 } else {
233 return simd<std::uint64_t, 2, Arch>::from_native(
234 detail::x86_avx512cd::maskz_vplzcntq<Arch>(
235 mask.to_bitset(), value.to_native()));
236 }
237 }
238
240 template<isa<x86> Arch>
241 requires(Arch.has(x86_feature::avx512f) &&
242 Arch.has(x86_feature::avx512cd) &&
243 Arch.has(x86_feature::avx512vl))
244 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
245 constexpr simd<std::uint32_t, 8, Arch> vpconflictd(simd<std::uint32_t, 8, Arch> value) noexcept {
246 if consteval {
247 return detail::x86_avx512cd_constant::evaluate<true>(
248 value, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
249 } else {
250 return simd<std::uint32_t, 8, Arch>::from_native(
251 detail::x86_avx512cd::vpconflictd<Arch>(value.to_native()));
252 }
253 }
254
256 template<isa<x86> Arch>
257 requires(Arch.has(x86_feature::avx512f) &&
258 Arch.has(x86_feature::avx512cd) &&
259 Arch.has(x86_feature::avx512vl))
260 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
261 constexpr simd<std::uint32_t, 8, Arch> mask_vpconflictd(
262 simd<std::uint32_t, 8, Arch> source,
263 predicate<8, Arch> mask,
264 simd<std::uint32_t, 8, Arch> value) noexcept {
265 if consteval {
266 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
267 } else {
268 return simd<std::uint32_t, 8, Arch>::from_native(
269 detail::x86_avx512cd::mask_vpconflictd<Arch>(
270 source.to_native(), mask.to_bitset(), value.to_native()));
271 }
272 }
273
275 template<isa<x86> Arch>
276 requires(Arch.has(x86_feature::avx512f) &&
277 Arch.has(x86_feature::avx512cd) &&
278 Arch.has(x86_feature::avx512vl))
279 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
280 constexpr simd<std::uint32_t, 8, Arch> maskz_vpconflictd(
281 predicate<8, Arch> mask,
282 simd<std::uint32_t, 8, Arch> value) noexcept {
283 if consteval {
284 return detail::x86_avx512cd_constant::evaluate<true>(
285 value, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
286 } else {
287 return simd<std::uint32_t, 8, Arch>::from_native(
288 detail::x86_avx512cd::maskz_vpconflictd<Arch>(
289 mask.to_bitset(), value.to_native()));
290 }
291 }
292
294 template<isa<x86> Arch>
295 requires(Arch.has(x86_feature::avx512f) &&
296 Arch.has(x86_feature::avx512cd) &&
297 Arch.has(x86_feature::avx512vl))
298 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
299 constexpr simd<std::uint32_t, 8, Arch> vplzcntd(simd<std::uint32_t, 8, Arch> value) noexcept {
300 if consteval {
301 return detail::x86_avx512cd_constant::evaluate<false>(
302 value, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
303 } else {
304 return simd<std::uint32_t, 8, Arch>::from_native(
305 detail::x86_avx512cd::vplzcntd<Arch>(value.to_native()));
306 }
307 }
308
310 template<isa<x86> Arch>
311 requires(Arch.has(x86_feature::avx512f) &&
312 Arch.has(x86_feature::avx512cd) &&
313 Arch.has(x86_feature::avx512vl))
314 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
315 constexpr simd<std::uint32_t, 8, Arch> mask_vplzcntd(
316 simd<std::uint32_t, 8, Arch> source,
317 predicate<8, Arch> mask,
318 simd<std::uint32_t, 8, Arch> value) noexcept {
319 if consteval {
320 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
321 } else {
322 return simd<std::uint32_t, 8, Arch>::from_native(
323 detail::x86_avx512cd::mask_vplzcntd<Arch>(
324 source.to_native(), mask.to_bitset(), value.to_native()));
325 }
326 }
327
329 template<isa<x86> Arch>
330 requires(Arch.has(x86_feature::avx512f) &&
331 Arch.has(x86_feature::avx512cd) &&
332 Arch.has(x86_feature::avx512vl))
333 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
334 constexpr simd<std::uint32_t, 8, Arch> maskz_vplzcntd(
335 predicate<8, Arch> mask,
336 simd<std::uint32_t, 8, Arch> value) noexcept {
337 if consteval {
338 return detail::x86_avx512cd_constant::evaluate<false>(
339 value, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
340 } else {
341 return simd<std::uint32_t, 8, Arch>::from_native(
342 detail::x86_avx512cd::maskz_vplzcntd<Arch>(
343 mask.to_bitset(), value.to_native()));
344 }
345 }
346
348 template<isa<x86> Arch>
349 requires(Arch.has(x86_feature::avx512f) &&
350 Arch.has(x86_feature::avx512cd) &&
351 Arch.has(x86_feature::avx512vl))
352 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
353 constexpr simd<std::uint64_t, 4, Arch> vpconflictq(simd<std::uint64_t, 4, Arch> value) noexcept {
354 if consteval {
355 return detail::x86_avx512cd_constant::evaluate<true>(
356 value, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
357 } else {
358 return simd<std::uint64_t, 4, Arch>::from_native(
359 detail::x86_avx512cd::vpconflictq<Arch>(value.to_native()));
360 }
361 }
362
364 template<isa<x86> Arch>
365 requires(Arch.has(x86_feature::avx512f) &&
366 Arch.has(x86_feature::avx512cd) &&
367 Arch.has(x86_feature::avx512vl))
368 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
369 constexpr simd<std::uint64_t, 4, Arch> mask_vpconflictq(
370 simd<std::uint64_t, 4, Arch> source,
371 predicate<4, Arch> mask,
372 simd<std::uint64_t, 4, Arch> value) noexcept {
373 if consteval {
374 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
375 } else {
376 return simd<std::uint64_t, 4, Arch>::from_native(
377 detail::x86_avx512cd::mask_vpconflictq<Arch>(
378 source.to_native(), mask.to_bitset(), value.to_native()));
379 }
380 }
381
383 template<isa<x86> Arch>
384 requires(Arch.has(x86_feature::avx512f) &&
385 Arch.has(x86_feature::avx512cd) &&
386 Arch.has(x86_feature::avx512vl))
387 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
388 constexpr simd<std::uint64_t, 4, Arch> maskz_vpconflictq(
389 predicate<4, Arch> mask,
390 simd<std::uint64_t, 4, Arch> value) noexcept {
391 if consteval {
392 return detail::x86_avx512cd_constant::evaluate<true>(
393 value, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
394 } else {
395 return simd<std::uint64_t, 4, Arch>::from_native(
396 detail::x86_avx512cd::maskz_vpconflictq<Arch>(
397 mask.to_bitset(), value.to_native()));
398 }
399 }
400
402 template<isa<x86> Arch>
403 requires(Arch.has(x86_feature::avx512f) &&
404 Arch.has(x86_feature::avx512cd) &&
405 Arch.has(x86_feature::avx512vl))
406 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
407 constexpr simd<std::uint64_t, 4, Arch> vplzcntq(simd<std::uint64_t, 4, Arch> value) noexcept {
408 if consteval {
409 return detail::x86_avx512cd_constant::evaluate<false>(
410 value, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
411 } else {
412 return simd<std::uint64_t, 4, Arch>::from_native(
413 detail::x86_avx512cd::vplzcntq<Arch>(value.to_native()));
414 }
415 }
416
418 template<isa<x86> Arch>
419 requires(Arch.has(x86_feature::avx512f) &&
420 Arch.has(x86_feature::avx512cd) &&
421 Arch.has(x86_feature::avx512vl))
422 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
423 constexpr simd<std::uint64_t, 4, Arch> mask_vplzcntq(
424 simd<std::uint64_t, 4, Arch> source,
425 predicate<4, Arch> mask,
426 simd<std::uint64_t, 4, Arch> value) noexcept {
427 if consteval {
428 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
429 } else {
430 return simd<std::uint64_t, 4, Arch>::from_native(
431 detail::x86_avx512cd::mask_vplzcntq<Arch>(
432 source.to_native(), mask.to_bitset(), value.to_native()));
433 }
434 }
435
437 template<isa<x86> Arch>
438 requires(Arch.has(x86_feature::avx512f) &&
439 Arch.has(x86_feature::avx512cd) &&
440 Arch.has(x86_feature::avx512vl))
441 native_nodiscard native_inline native_const native_target("avx512f,avx512cd,avx512vl")
442 constexpr simd<std::uint64_t, 4, Arch> maskz_vplzcntq(
443 predicate<4, Arch> mask,
444 simd<std::uint64_t, 4, Arch> value) noexcept {
445 if consteval {
446 return detail::x86_avx512cd_constant::evaluate<false>(
447 value, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
448 } else {
449 return simd<std::uint64_t, 4, Arch>::from_native(
450 detail::x86_avx512cd::maskz_vplzcntq<Arch>(
451 mask.to_bitset(), value.to_native()));
452 }
453 }
454
456 template<isa<x86> Arch>
457 requires(Arch.has(x86_feature::avx512f) &&
458 Arch.has(x86_feature::avx512cd))
459 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
460 constexpr simd<std::uint32_t, 16, Arch> vpconflictd(
461 simd<std::uint32_t, 16, Arch> value) noexcept {
462 if consteval {
463 return detail::x86_avx512cd_constant::evaluate<true>(
464 value, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
465 } else {
466 return simd<std::uint32_t, 16, Arch>::from_native(
467 detail::x86_avx512cd::vpconflictd<Arch>(value.to_native()));
468 }
469 }
470
472 template<isa<x86> Arch>
473 requires(Arch.has(x86_feature::avx512f) &&
474 Arch.has(x86_feature::avx512cd))
475 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
476 constexpr simd<std::uint32_t, 16, Arch> mask_vpconflictd(
477 simd<std::uint32_t, 16, Arch> source,
478 predicate<16, Arch> mask,
479 simd<std::uint32_t, 16, Arch> value) noexcept {
480 if consteval {
481 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
482 } else {
483 return simd<std::uint32_t, 16, Arch>::from_native(
484 detail::x86_avx512cd::mask_vpconflictd<Arch>(
485 source.to_native(), mask.to_bitset(), value.to_native()));
486 }
487 }
488
490 template<isa<x86> Arch>
491 requires(Arch.has(x86_feature::avx512f) &&
492 Arch.has(x86_feature::avx512cd))
493 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
494 constexpr simd<std::uint32_t, 16, Arch> maskz_vpconflictd(
495 predicate<16, Arch> mask,
496 simd<std::uint32_t, 16, Arch> value) noexcept {
497 if consteval {
498 return detail::x86_avx512cd_constant::evaluate<true>(
499 value, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
500 } else {
501 return simd<std::uint32_t, 16, Arch>::from_native(
502 detail::x86_avx512cd::maskz_vpconflictd<Arch>(
503 mask.to_bitset(), value.to_native()));
504 }
505 }
506
508 template<isa<x86> Arch>
509 requires(Arch.has(x86_feature::avx512f) &&
510 Arch.has(x86_feature::avx512cd))
511 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
512 constexpr simd<std::uint32_t, 16, Arch> vplzcntd(simd<std::uint32_t, 16, Arch> value) noexcept {
513 if consteval {
514 return detail::x86_avx512cd_constant::evaluate<false>(
515 value, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
516 } else {
517 return simd<std::uint32_t, 16, Arch>::from_native(
518 detail::x86_avx512cd::vplzcntd<Arch>(value.to_native()));
519 }
520 }
521
523 template<isa<x86> Arch>
524 requires(Arch.has(x86_feature::avx512f) &&
525 Arch.has(x86_feature::avx512cd))
526 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
527 constexpr simd<std::uint32_t, 16, Arch> mask_vplzcntd(
528 simd<std::uint32_t, 16, Arch> source,
529 predicate<16, Arch> mask,
530 simd<std::uint32_t, 16, Arch> value) noexcept {
531 if consteval {
532 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
533 } else {
534 return simd<std::uint32_t, 16, Arch>::from_native(
535 detail::x86_avx512cd::mask_vplzcntd<Arch>(
536 source.to_native(), mask.to_bitset(), value.to_native()));
537 }
538 }
539
541 template<isa<x86> Arch>
542 requires(Arch.has(x86_feature::avx512f) &&
543 Arch.has(x86_feature::avx512cd))
544 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
545 constexpr simd<std::uint32_t, 16, Arch> maskz_vplzcntd(
546 predicate<16, Arch> mask,
547 simd<std::uint32_t, 16, Arch> value) noexcept {
548 if consteval {
549 return detail::x86_avx512cd_constant::evaluate<false>(
550 value, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
551 } else {
552 return simd<std::uint32_t, 16, Arch>::from_native(
553 detail::x86_avx512cd::maskz_vplzcntd<Arch>(
554 mask.to_bitset(), value.to_native()));
555 }
556 }
557
559 template<isa<x86> Arch>
560 requires(Arch.has(x86_feature::avx512f) &&
561 Arch.has(x86_feature::avx512cd))
562 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
563 constexpr simd<std::uint64_t, 8, Arch> vpconflictq(simd<std::uint64_t, 8, Arch> value) noexcept {
564 if consteval {
565 return detail::x86_avx512cd_constant::evaluate<true>(
566 value, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
567 } else {
568 return simd<std::uint64_t, 8, Arch>::from_native(
569 detail::x86_avx512cd::vpconflictq<Arch>(value.to_native()));
570 }
571 }
572
574 template<isa<x86> Arch>
575 requires(Arch.has(x86_feature::avx512f) &&
576 Arch.has(x86_feature::avx512cd))
577 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
578 constexpr simd<std::uint64_t, 8, Arch> mask_vpconflictq(
579 simd<std::uint64_t, 8, Arch> source,
580 predicate<8, Arch> mask,
581 simd<std::uint64_t, 8, Arch> value) noexcept {
582 if consteval {
583 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
584 } else {
585 return simd<std::uint64_t, 8, Arch>::from_native(
586 detail::x86_avx512cd::mask_vpconflictq<Arch>(
587 source.to_native(), mask.to_bitset(), value.to_native()));
588 }
589 }
590
592 template<isa<x86> Arch>
593 requires(Arch.has(x86_feature::avx512f) &&
594 Arch.has(x86_feature::avx512cd))
595 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
596 constexpr simd<std::uint64_t, 8, Arch> maskz_vpconflictq(
597 predicate<8, Arch> mask,
598 simd<std::uint64_t, 8, Arch> value) noexcept {
599 if consteval {
600 return detail::x86_avx512cd_constant::evaluate<true>(
601 value, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
602 } else {
603 return simd<std::uint64_t, 8, Arch>::from_native(
604 detail::x86_avx512cd::maskz_vpconflictq<Arch>(
605 mask.to_bitset(), value.to_native()));
606 }
607 }
608
610 template<isa<x86> Arch>
611 requires(Arch.has(x86_feature::avx512f) &&
612 Arch.has(x86_feature::avx512cd))
613 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
614 constexpr simd<std::uint64_t, 8, Arch> vplzcntq(simd<std::uint64_t, 8, Arch> value) noexcept {
615 if consteval {
616 return detail::x86_avx512cd_constant::evaluate<false>(
617 value, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
618 } else {
619 return simd<std::uint64_t, 8, Arch>::from_native(
620 detail::x86_avx512cd::vplzcntq<Arch>(value.to_native()));
621 }
622 }
623
625 template<isa<x86> Arch>
626 requires(Arch.has(x86_feature::avx512f) &&
627 Arch.has(x86_feature::avx512cd))
628 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
629 constexpr simd<std::uint64_t, 8, Arch> mask_vplzcntq(
630 simd<std::uint64_t, 8, Arch> source,
631 predicate<8, Arch> mask,
632 simd<std::uint64_t, 8, Arch> value) noexcept {
633 if consteval {
634 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
635 } else {
636 return simd<std::uint64_t, 8, Arch>::from_native(
637 detail::x86_avx512cd::mask_vplzcntq<Arch>(
638 source.to_native(), mask.to_bitset(), value.to_native()));
639 }
640 }
641
643 template<isa<x86> Arch>
644 requires(Arch.has(x86_feature::avx512f) &&
645 Arch.has(x86_feature::avx512cd))
646 native_nodiscard native_inline native_const native_target("avx512f,avx512cd")
647 constexpr simd<std::uint64_t, 8, Arch> maskz_vplzcntq(
648 predicate<8, Arch> mask,
649 simd<std::uint64_t, 8, Arch> value) noexcept {
650 if consteval {
651 return detail::x86_avx512cd_constant::evaluate<false>(
652 value, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
653 } else {
654 return simd<std::uint64_t, 8, Arch>::from_native(
655 detail::x86_avx512cd::maskz_vplzcntq<Arch>(
656 mask.to_bitset(), value.to_native()));
657 }
658 }
659
661 template<isa<x86> Arch>
662 requires(!(Arch.has(x86_feature::avx512f) &&
663 Arch.has(x86_feature::avx512cd) &&
664 Arch.has(x86_feature::avx512vl)) &&
665 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
666 native_nodiscard consteval simd<std::uint32_t, 4, Arch> vpconflictd(
667 simd<std::uint32_t, 4, Arch> value) noexcept {
668 return detail::x86_avx512cd_constant::evaluate<true>(
669 value, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
670 }
671
673 template<isa<x86> Arch>
674 requires(!(Arch.has(x86_feature::avx512f) &&
675 Arch.has(x86_feature::avx512cd) &&
676 Arch.has(x86_feature::avx512vl)) &&
677 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
678 native_nodiscard consteval simd<std::uint32_t, 4, Arch> mask_vpconflictd(
679 simd<std::uint32_t, 4, Arch> source,
680 predicate<4, Arch> mask,
681 simd<std::uint32_t, 4, Arch> value) noexcept {
682 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
683 }
684
686 template<isa<x86> Arch>
687 requires(!(Arch.has(x86_feature::avx512f) &&
688 Arch.has(x86_feature::avx512cd) &&
689 Arch.has(x86_feature::avx512vl)) &&
690 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
691 native_nodiscard consteval simd<std::uint32_t, 4, Arch> maskz_vpconflictd(
692 predicate<4, Arch> mask,
693 simd<std::uint32_t, 4, Arch> value) noexcept {
694 return detail::x86_avx512cd_constant::evaluate<true>(
695 value, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
696 }
697
699 template<isa<x86> Arch>
700 requires(!(Arch.has(x86_feature::avx512f) &&
701 Arch.has(x86_feature::avx512cd) &&
702 Arch.has(x86_feature::avx512vl)) &&
703 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
704 native_nodiscard consteval simd<std::uint32_t, 4, Arch> vplzcntd(
705 simd<std::uint32_t, 4, Arch> value) noexcept {
706 return detail::x86_avx512cd_constant::evaluate<false>(
707 value, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
708 }
709
711 template<isa<x86> Arch>
712 requires(!(Arch.has(x86_feature::avx512f) &&
713 Arch.has(x86_feature::avx512cd) &&
714 Arch.has(x86_feature::avx512vl)) &&
715 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
716 native_nodiscard consteval simd<std::uint32_t, 4, Arch> mask_vplzcntd(
717 simd<std::uint32_t, 4, Arch> source,
718 predicate<4, Arch> mask,
719 simd<std::uint32_t, 4, Arch> value) noexcept {
720 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
721 }
722
724 template<isa<x86> Arch>
725 requires(!(Arch.has(x86_feature::avx512f) &&
726 Arch.has(x86_feature::avx512cd) &&
727 Arch.has(x86_feature::avx512vl)) &&
728 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
729 native_nodiscard consteval simd<std::uint32_t, 4, Arch> maskz_vplzcntd(
730 predicate<4, Arch> mask,
731 simd<std::uint32_t, 4, Arch> value) noexcept {
732 return detail::x86_avx512cd_constant::evaluate<false>(
733 value, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
734 }
735
737 template<isa<x86> Arch>
738 requires(!(Arch.has(x86_feature::avx512f) &&
739 Arch.has(x86_feature::avx512cd) &&
740 Arch.has(x86_feature::avx512vl)) &&
741 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
742 native_nodiscard consteval simd<std::uint64_t, 2, Arch> vpconflictq(
743 simd<std::uint64_t, 2, Arch> value) noexcept {
744 return detail::x86_avx512cd_constant::evaluate<true>(
745 value, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
746 }
747
749 template<isa<x86> Arch>
750 requires(!(Arch.has(x86_feature::avx512f) &&
751 Arch.has(x86_feature::avx512cd) &&
752 Arch.has(x86_feature::avx512vl)) &&
753 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
754 native_nodiscard consteval simd<std::uint64_t, 2, Arch> mask_vpconflictq(
755 simd<std::uint64_t, 2, Arch> source,
756 predicate<2, Arch> mask,
757 simd<std::uint64_t, 2, Arch> value) noexcept {
758 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
759 }
760
762 template<isa<x86> Arch>
763 requires(!(Arch.has(x86_feature::avx512f) &&
764 Arch.has(x86_feature::avx512cd) &&
765 Arch.has(x86_feature::avx512vl)) &&
766 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
767 native_nodiscard consteval simd<std::uint64_t, 2, Arch> maskz_vpconflictq(
768 predicate<2, Arch> mask,
769 simd<std::uint64_t, 2, Arch> value) noexcept {
770 return detail::x86_avx512cd_constant::evaluate<true>(
771 value, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
772 }
773
775 template<isa<x86> Arch>
776 requires(!(Arch.has(x86_feature::avx512f) &&
777 Arch.has(x86_feature::avx512cd) &&
778 Arch.has(x86_feature::avx512vl)) &&
779 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
780 native_nodiscard consteval simd<std::uint64_t, 2, Arch> vplzcntq(
781 simd<std::uint64_t, 2, Arch> value) noexcept {
782 return detail::x86_avx512cd_constant::evaluate<false>(
783 value, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
784 }
785
787 template<isa<x86> Arch>
788 requires(!(Arch.has(x86_feature::avx512f) &&
789 Arch.has(x86_feature::avx512cd) &&
790 Arch.has(x86_feature::avx512vl)) &&
791 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
792 native_nodiscard consteval simd<std::uint64_t, 2, Arch> mask_vplzcntq(
793 simd<std::uint64_t, 2, Arch> source,
794 predicate<2, Arch> mask,
795 simd<std::uint64_t, 2, Arch> value) noexcept {
796 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
797 }
798
800 template<isa<x86> Arch>
801 requires(!(Arch.has(x86_feature::avx512f) &&
802 Arch.has(x86_feature::avx512cd) &&
803 Arch.has(x86_feature::avx512vl)) &&
804 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
805 native_nodiscard consteval simd<std::uint64_t, 2, Arch> maskz_vplzcntq(
806 predicate<2, Arch> mask,
807 simd<std::uint64_t, 2, Arch> value) noexcept {
808 return detail::x86_avx512cd_constant::evaluate<false>(
809 value, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
810 }
811
813 template<isa<x86> Arch>
814 requires(!(Arch.has(x86_feature::avx512f) &&
815 Arch.has(x86_feature::avx512cd) &&
816 Arch.has(x86_feature::avx512vl)) &&
817 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
818 native_nodiscard consteval simd<std::uint32_t, 8, Arch> vpconflictd(
819 simd<std::uint32_t, 8, Arch> value) noexcept {
820 return detail::x86_avx512cd_constant::evaluate<true>(
821 value, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
822 }
823
825 template<isa<x86> Arch>
826 requires(!(Arch.has(x86_feature::avx512f) &&
827 Arch.has(x86_feature::avx512cd) &&
828 Arch.has(x86_feature::avx512vl)) &&
829 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
830 native_nodiscard consteval simd<std::uint32_t, 8, Arch> mask_vpconflictd(
831 simd<std::uint32_t, 8, Arch> source,
832 predicate<8, Arch> mask,
833 simd<std::uint32_t, 8, Arch> value) noexcept {
834 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
835 }
836
838 template<isa<x86> Arch>
839 requires(!(Arch.has(x86_feature::avx512f) &&
840 Arch.has(x86_feature::avx512cd) &&
841 Arch.has(x86_feature::avx512vl)) &&
842 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
843 native_nodiscard consteval simd<std::uint32_t, 8, Arch> maskz_vpconflictd(
844 predicate<8, Arch> mask,
845 simd<std::uint32_t, 8, Arch> value) noexcept {
846 return detail::x86_avx512cd_constant::evaluate<true>(
847 value, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
848 }
849
851 template<isa<x86> Arch>
852 requires(!(Arch.has(x86_feature::avx512f) &&
853 Arch.has(x86_feature::avx512cd) &&
854 Arch.has(x86_feature::avx512vl)) &&
855 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
856 native_nodiscard consteval simd<std::uint32_t, 8, Arch> vplzcntd(
857 simd<std::uint32_t, 8, Arch> value) noexcept {
858 return detail::x86_avx512cd_constant::evaluate<false>(
859 value, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
860 }
861
863 template<isa<x86> Arch>
864 requires(!(Arch.has(x86_feature::avx512f) &&
865 Arch.has(x86_feature::avx512cd) &&
866 Arch.has(x86_feature::avx512vl)) &&
867 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
868 native_nodiscard consteval simd<std::uint32_t, 8, Arch> mask_vplzcntd(
869 simd<std::uint32_t, 8, Arch> source,
870 predicate<8, Arch> mask,
871 simd<std::uint32_t, 8, Arch> value) noexcept {
872 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
873 }
874
876 template<isa<x86> Arch>
877 requires(!(Arch.has(x86_feature::avx512f) &&
878 Arch.has(x86_feature::avx512cd) &&
879 Arch.has(x86_feature::avx512vl)) &&
880 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
881 native_nodiscard consteval simd<std::uint32_t, 8, Arch> maskz_vplzcntd(
882 predicate<8, Arch> mask,
883 simd<std::uint32_t, 8, Arch> value) noexcept {
884 return detail::x86_avx512cd_constant::evaluate<false>(
885 value, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
886 }
887
889 template<isa<x86> Arch>
890 requires(!(Arch.has(x86_feature::avx512f) &&
891 Arch.has(x86_feature::avx512cd) &&
892 Arch.has(x86_feature::avx512vl)) &&
893 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
894 native_nodiscard consteval simd<std::uint64_t, 4, Arch> vpconflictq(
895 simd<std::uint64_t, 4, Arch> value) noexcept {
896 return detail::x86_avx512cd_constant::evaluate<true>(
897 value, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
898 }
899
901 template<isa<x86> Arch>
902 requires(!(Arch.has(x86_feature::avx512f) &&
903 Arch.has(x86_feature::avx512cd) &&
904 Arch.has(x86_feature::avx512vl)) &&
905 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
906 native_nodiscard consteval simd<std::uint64_t, 4, Arch> mask_vpconflictq(
907 simd<std::uint64_t, 4, Arch> source,
908 predicate<4, Arch> mask,
909 simd<std::uint64_t, 4, Arch> value) noexcept {
910 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
911 }
912
914 template<isa<x86> Arch>
915 requires(!(Arch.has(x86_feature::avx512f) &&
916 Arch.has(x86_feature::avx512cd) &&
917 Arch.has(x86_feature::avx512vl)) &&
918 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
919 native_nodiscard consteval simd<std::uint64_t, 4, Arch> maskz_vpconflictq(
920 predicate<4, Arch> mask,
921 simd<std::uint64_t, 4, Arch> value) noexcept {
922 return detail::x86_avx512cd_constant::evaluate<true>(
923 value, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
924 }
925
927 template<isa<x86> Arch>
928 requires(!(Arch.has(x86_feature::avx512f) &&
929 Arch.has(x86_feature::avx512cd) &&
930 Arch.has(x86_feature::avx512vl)) &&
931 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
932 native_nodiscard consteval simd<std::uint64_t, 4, Arch> vplzcntq(
933 simd<std::uint64_t, 4, Arch> value) noexcept {
934 return detail::x86_avx512cd_constant::evaluate<false>(
935 value, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
936 }
937
939 template<isa<x86> Arch>
940 requires(!(Arch.has(x86_feature::avx512f) &&
941 Arch.has(x86_feature::avx512cd) &&
942 Arch.has(x86_feature::avx512vl)) &&
943 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
944 native_nodiscard consteval simd<std::uint64_t, 4, Arch> mask_vplzcntq(
945 simd<std::uint64_t, 4, Arch> source,
946 predicate<4, Arch> mask,
947 simd<std::uint64_t, 4, Arch> value) noexcept {
948 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
949 }
950
952 template<isa<x86> Arch>
953 requires(!(Arch.has(x86_feature::avx512f) &&
954 Arch.has(x86_feature::avx512cd) &&
955 Arch.has(x86_feature::avx512vl)) &&
956 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
957 native_nodiscard consteval simd<std::uint64_t, 4, Arch> maskz_vplzcntq(
958 predicate<4, Arch> mask,
959 simd<std::uint64_t, 4, Arch> value) noexcept {
960 return detail::x86_avx512cd_constant::evaluate<false>(
961 value, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
962 }
963
965 template<isa<x86> Arch>
966 requires(!(Arch.has(x86_feature::avx512f) &&
967 Arch.has(x86_feature::avx512cd)) &&
968 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
969 native_nodiscard consteval simd<std::uint32_t, 16, Arch> vpconflictd(
970 simd<std::uint32_t, 16, Arch> value) noexcept {
971 return detail::x86_avx512cd_constant::evaluate<true>(
972 value, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
973 }
974
976 template<isa<x86> Arch>
977 requires(!(Arch.has(x86_feature::avx512f) &&
978 Arch.has(x86_feature::avx512cd)) &&
979 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
980 native_nodiscard consteval simd<std::uint32_t, 16, Arch> mask_vpconflictd(
981 simd<std::uint32_t, 16, Arch> source,
982 predicate<16, Arch> mask,
983 simd<std::uint32_t, 16, Arch> value) noexcept {
984 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
985 }
986
988 template<isa<x86> Arch>
989 requires(!(Arch.has(x86_feature::avx512f) &&
990 Arch.has(x86_feature::avx512cd)) &&
991 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
992 native_nodiscard consteval simd<std::uint32_t, 16, Arch> maskz_vpconflictd(
993 predicate<16, Arch> mask,
994 simd<std::uint32_t, 16, Arch> value) noexcept {
995 return detail::x86_avx512cd_constant::evaluate<true>(
996 value, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
997 }
998
1000 template<isa<x86> Arch>
1001 requires(!(Arch.has(x86_feature::avx512f) &&
1002 Arch.has(x86_feature::avx512cd)) &&
1003 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
1004 native_nodiscard consteval simd<std::uint32_t, 16, Arch> vplzcntd(
1005 simd<std::uint32_t, 16, Arch> value) noexcept {
1006 return detail::x86_avx512cd_constant::evaluate<false>(
1007 value, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
1008 }
1009
1011 template<isa<x86> Arch>
1012 requires(!(Arch.has(x86_feature::avx512f) &&
1013 Arch.has(x86_feature::avx512cd)) &&
1014 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
1015 native_nodiscard consteval simd<std::uint32_t, 16, Arch> mask_vplzcntd(
1016 simd<std::uint32_t, 16, Arch> source,
1017 predicate<16, Arch> mask,
1018 simd<std::uint32_t, 16, Arch> value) noexcept {
1019 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
1020 }
1021
1023 template<isa<x86> Arch>
1024 requires(!(Arch.has(x86_feature::avx512f) &&
1025 Arch.has(x86_feature::avx512cd)) &&
1026 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
1027 native_nodiscard consteval simd<std::uint32_t, 16, Arch> maskz_vplzcntd(
1028 predicate<16, Arch> mask,
1029 simd<std::uint32_t, 16, Arch> value) noexcept {
1030 return detail::x86_avx512cd_constant::evaluate<false>(
1031 value, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
1032 }
1033
1035 template<isa<x86> Arch>
1036 requires(!(Arch.has(x86_feature::avx512f) &&
1037 Arch.has(x86_feature::avx512cd)) &&
1038 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
1039 native_nodiscard consteval simd<std::uint64_t, 8, Arch> vpconflictq(
1040 simd<std::uint64_t, 8, Arch> value) noexcept {
1041 return detail::x86_avx512cd_constant::evaluate<true>(
1042 value, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
1043 }
1044
1046 template<isa<x86> Arch>
1047 requires(!(Arch.has(x86_feature::avx512f) &&
1048 Arch.has(x86_feature::avx512cd)) &&
1049 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
1050 native_nodiscard consteval simd<std::uint64_t, 8, Arch> mask_vpconflictq(
1051 simd<std::uint64_t, 8, Arch> source,
1052 predicate<8, Arch> mask,
1053 simd<std::uint64_t, 8, Arch> value) noexcept {
1054 return detail::x86_avx512cd_constant::evaluate<true>(value, source, mask.to_bitset());
1055 }
1056
1058 template<isa<x86> Arch>
1059 requires(!(Arch.has(x86_feature::avx512f) &&
1060 Arch.has(x86_feature::avx512cd)) &&
1061 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
1062 native_nodiscard consteval simd<std::uint64_t, 8, Arch> maskz_vpconflictq(
1063 predicate<8, Arch> mask,
1064 simd<std::uint64_t, 8, Arch> value) noexcept {
1065 return detail::x86_avx512cd_constant::evaluate<true>(
1066 value, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
1067 }
1068
1070 template<isa<x86> Arch>
1071 requires(!(Arch.has(x86_feature::avx512f) &&
1072 Arch.has(x86_feature::avx512cd)) &&
1073 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
1074 native_nodiscard consteval simd<std::uint64_t, 8, Arch> vplzcntq(
1075 simd<std::uint64_t, 8, Arch> value) noexcept {
1076 return detail::x86_avx512cd_constant::evaluate<false>(
1077 value, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
1078 }
1079
1081 template<isa<x86> Arch>
1082 requires(!(Arch.has(x86_feature::avx512f) &&
1083 Arch.has(x86_feature::avx512cd)) &&
1084 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
1085 native_nodiscard consteval simd<std::uint64_t, 8, Arch> mask_vplzcntq(
1086 simd<std::uint64_t, 8, Arch> source,
1087 predicate<8, Arch> mask,
1088 simd<std::uint64_t, 8, Arch> value) noexcept {
1089 return detail::x86_avx512cd_constant::evaluate<false>(value, source, mask.to_bitset());
1090 }
1091
1093 template<isa<x86> Arch>
1094 requires(!(Arch.has(x86_feature::avx512f) &&
1095 Arch.has(x86_feature::avx512cd)) &&
1096 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
1097 native_nodiscard consteval simd<std::uint64_t, 8, Arch> maskz_vplzcntq(
1098 predicate<8, Arch> mask,
1099 simd<std::uint64_t, 8, Arch> value) noexcept {
1100 return detail::x86_avx512cd_constant::evaluate<false>(
1101 value, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
1102 }
1103
1105 template<isa<x86> Arch, class... Args>
1106 void vpconflictd(Args...) = delete;
1107
1109 template<isa<x86> Arch, class... Args>
1110 void mask_vpconflictd(Args...) = delete;
1111
1113 template<isa<x86> Arch, class... Args>
1114 void maskz_vpconflictd(Args...) = delete;
1115
1117 template<isa<x86> Arch, class... Args>
1118 void vplzcntd(Args...) = delete;
1119
1121 template<isa<x86> Arch, class... Args>
1122 void mask_vplzcntd(Args...) = delete;
1123
1125 template<isa<x86> Arch, class... Args>
1126 void maskz_vplzcntd(Args...) = delete;
1127
1129 template<isa<x86> Arch, class... Args>
1130 void vpconflictq(Args...) = delete;
1131
1133 template<isa<x86> Arch, class... Args>
1134 void mask_vpconflictq(Args...) = delete;
1135
1137 template<isa<x86> Arch, class... Args>
1138 void maskz_vpconflictq(Args...) = delete;
1139
1141 template<isa<x86> Arch, class... Args>
1142 void vplzcntq(Args...) = delete;
1143
1145 template<isa<x86> Arch, class... Args>
1146 void mask_vplzcntq(Args...) = delete;
1147
1149 template<isa<x86> Arch, class... Args>
1150 void maskz_vplzcntq(Args...) = delete;
1151
1153}
1154#endif
native_inline
#define native_inline
inline [[always_inline]]
Definition attributes.h:212
native_nodiscard
#define native_nodiscard
C++17 [[nodiscard]].
Definition attributes.h:189
native_const
#define native_const
[[const]] is not const
Definition attributes.h:108
native_target
#define native_target(x)
this indicates a required feature set for the current multiversioned function.
Definition attributes.h:476
native::mask
typename mask_traits< std::remove_cvref_t< T > >::type mask
Definition mask_traits.h:22
native::maskz_vpconflictq
constexpr simd< std::uint64_t, 2, Arch > maskz_vpconflictq(predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > value) noexcept
Inactive destination lanes become zero; every input lane still participates.
Definition native.x86.avx512cd.ccm:172
native::mask_vpconflictd
constexpr simd< std::uint32_t, 4, Arch > mask_vpconflictd(simd< std::uint32_t, 4, Arch > source, predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > value) noexcept
Inactive destination lanes retain source; every input lane still participates.
Definition native.x86.avx512cd.ccm:45
native::maskz_vpconflictd
constexpr simd< std::uint32_t, 4, Arch > maskz_vpconflictd(predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > value) noexcept
Inactive destination lanes become zero; every input lane still participates.
Definition native.x86.avx512cd.ccm:64
native::vpconflictd
constexpr simd< std::uint32_t, 4, Arch > vpconflictd(simd< std::uint32_t, 4, Arch > value) noexcept
For each 32-bit lane, set bit j when earlier source lane j is equal.
Definition native.x86.avx512cd.ccm:29
native::vpconflictq
constexpr simd< std::uint64_t, 2, Arch > vpconflictq(simd< std::uint64_t, 2, Arch > value) noexcept
For each 64-bit lane, set bit j when earlier source lane j is equal.
Definition native.x86.avx512cd.ccm:137
native::mask_vplzcntq
constexpr simd< std::uint64_t, 2, Arch > mask_vplzcntq(simd< std::uint64_t, 2, Arch > source, predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > value) noexcept
Inactive destination lanes retain source; zero input yields the lane width.
Definition native.x86.avx512cd.ccm:207
native::vplzcntd
constexpr simd< std::uint32_t, 4, Arch > vplzcntd(simd< std::uint32_t, 4, Arch > value) noexcept
Count leading zeros in each 32-bit lane; zero yields 32.
Definition native.x86.avx512cd.ccm:83
native::mask_vpconflictq
constexpr simd< std::uint64_t, 2, Arch > mask_vpconflictq(simd< std::uint64_t, 2, Arch > source, predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > value) noexcept
Inactive destination lanes retain source; every input lane still participates.
Definition native.x86.avx512cd.ccm:153
native::vplzcntq
constexpr simd< std::uint64_t, 2, Arch > vplzcntq(simd< std::uint64_t, 2, Arch > value) noexcept
Count leading zeros in each 64-bit lane; zero yields 64.
Definition native.x86.avx512cd.ccm:191
native::maskz_vplzcntd
constexpr simd< std::uint32_t, 4, Arch > maskz_vplzcntd(predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > value) noexcept
Inactive destination lanes become zero; zero input yields the lane width.
Definition native.x86.avx512cd.ccm:118
native::maskz_vplzcntq
constexpr simd< std::uint64_t, 2, Arch > maskz_vplzcntq(predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > value) noexcept
Inactive destination lanes become zero; zero input yields the lane width.
Definition native.x86.avx512cd.ccm:226
native::mask_vplzcntd
constexpr simd< std::uint32_t, 4, Arch > mask_vplzcntd(simd< std::uint32_t, 4, Arch > source, predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > value) noexcept
Inactive destination lanes retain source; zero input yields the lane width.
Definition native.x86.avx512cd.ccm:99
native.simd
native.x86.avx512cd
native.x86.features
native
Architecture-tagged vectors, register packs and supporting value types. Native arithmetic follows its...
Definition native.arm.aes.ccm:10
std
Standard-library adaptations documented here for SIMD value types.
native::simd
Omitted architecture arguments use the native.simd provider's baseline.
Definition native.simd.ccm:19