native 0.0.1
Vectors, masks and wide register packs for C++26
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native.x86.sha.ccm
1// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
2module;
3
4#include "native/isa_import.h"
5#include "native/x86/sha.h"
6
7export module native.x86.sha;
8export import native.x86.features;
9export import native.simd;
10
11// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
12
13#if NATIVE_HOST_X86 || defined(NATIVE_DOXYGEN)
14export namespace native {
23
25 template<isa<x86> Arch, unsigned Selector> requires(Arch.has(x86_feature::sha) && Selector < 4)
26 native_nodiscard native_inline native_const native_target("sha")
27 constexpr simd<std::uint32_t, 4, Arch> sha1rnds4(
28 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
29 if consteval {
30 return detail::x86_sha_constant::rounds1<Selector>(a, b);
31 } else {
32 return simd<std::uint32_t, 4, Arch>::from_native(
33 detail::x86_sha::sha1rnds4<Arch, Selector>(a.to_native(), b.to_native()));
34 }
35 }
36
38 template<isa<x86> Arch, unsigned Selector> requires(!Arch.has(x86_feature::sha) && Selector < 4 &&
39 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
40 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha1rnds4(
41 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
42 return detail::x86_sha_constant::rounds1<Selector>(a, b);
43 }
44
46 template<isa<x86> Arch, unsigned Selector, class... Args>
47 void sha1rnds4(Args...) = delete;
48
50 template<isa<x86> Arch> requires(Arch.has(x86_feature::sha))
51 native_nodiscard native_inline native_const native_target("sha")
52 constexpr simd<std::uint32_t, 4, Arch> sha1nexte(
53 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
54 if consteval {
55 return detail::x86_sha_constant::next_e(a, b);
56 } else {
57 return simd<std::uint32_t, 4, Arch>::from_native(
58 detail::x86_sha::sha1nexte<Arch>(a.to_native(), b.to_native()));
59 }
60 }
61
63 template<isa<x86> Arch> requires(!Arch.has(x86_feature::sha) &&
64 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
65 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha1nexte(
66 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
67 return detail::x86_sha_constant::next_e(a, b);
68 }
69
71 template<isa<x86> Arch, class... Args>
72 void sha1nexte(Args...) = delete;
73
75 template<isa<x86> Arch> requires(Arch.has(x86_feature::sha))
76 native_nodiscard native_inline native_const native_target("sha")
77 constexpr simd<std::uint32_t, 4, Arch> sha1msg1(
78 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
79 if consteval {
80 return detail::x86_sha_constant::message1_first(a, b);
81 } else {
82 return simd<std::uint32_t, 4, Arch>::from_native(
83 detail::x86_sha::sha1msg1<Arch>(a.to_native(), b.to_native()));
84 }
85 }
86
88 template<isa<x86> Arch> requires(!Arch.has(x86_feature::sha) &&
89 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
90 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha1msg1(
91 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
92 return detail::x86_sha_constant::message1_first(a, b);
93 }
94
96 template<isa<x86> Arch, class... Args>
97 void sha1msg1(Args...) = delete;
98
100 template<isa<x86> Arch> requires(Arch.has(x86_feature::sha))
101 native_nodiscard native_inline native_const native_target("sha")
102 constexpr simd<std::uint32_t, 4, Arch> sha1msg2(
103 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
104 if consteval {
105 return detail::x86_sha_constant::message1_last(a, b);
106 } else {
107 return simd<std::uint32_t, 4, Arch>::from_native(
108 detail::x86_sha::sha1msg2<Arch>(a.to_native(), b.to_native()));
109 }
110 }
111
113 template<isa<x86> Arch> requires(!Arch.has(x86_feature::sha) &&
114 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
115 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha1msg2(
116 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
117 return detail::x86_sha_constant::message1_last(a, b);
118 }
119
121 template<isa<x86> Arch, class... Args>
122 void sha1msg2(Args...) = delete;
123
125 template<isa<x86> Arch> requires(Arch.has(x86_feature::sha))
126 native_nodiscard native_inline native_const native_target("sha")
127 constexpr simd<std::uint32_t, 4, Arch> sha256rnds2(
128 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b, simd<std::uint32_t, 4, Arch> c) noexcept {
129 if consteval {
130 return detail::x86_sha_constant::rounds256(a, b, c);
131 } else {
132 return simd<std::uint32_t, 4, Arch>::from_native(
133 detail::x86_sha::sha256rnds2<Arch>(a.to_native(), b.to_native(), c.to_native()));
134 }
135 }
136
138 template<isa<x86> Arch> requires(!Arch.has(x86_feature::sha) &&
139 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
140 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha256rnds2(
141 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b, simd<std::uint32_t, 4, Arch> c) noexcept {
142 return detail::x86_sha_constant::rounds256(a, b, c);
143 }
144
146 template<isa<x86> Arch, class... Args>
147 void sha256rnds2(Args...) = delete;
148
150 template<isa<x86> Arch> requires(Arch.has(x86_feature::sha))
151 native_nodiscard native_inline native_const native_target("sha")
152 constexpr simd<std::uint32_t, 4, Arch> sha256msg1(
153 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
154 if consteval {
155 return detail::x86_sha_constant::message256_first(a, b);
156 } else {
157 return simd<std::uint32_t, 4, Arch>::from_native(
158 detail::x86_sha::sha256msg1<Arch>(a.to_native(), b.to_native()));
159 }
160 }
161
163 template<isa<x86> Arch> requires(!Arch.has(x86_feature::sha) &&
164 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
165 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha256msg1(
166 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
167 return detail::x86_sha_constant::message256_first(a, b);
168 }
169
171 template<isa<x86> Arch, class... Args>
172 void sha256msg1(Args...) = delete;
173
175 template<isa<x86> Arch> requires(Arch.has(x86_feature::sha))
176 native_nodiscard native_inline native_const native_target("sha")
177 constexpr simd<std::uint32_t, 4, Arch> sha256msg2(
178 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
179 if consteval {
180 return detail::x86_sha_constant::message256_last(a, b);
181 } else {
182 return simd<std::uint32_t, 4, Arch>::from_native(
183 detail::x86_sha::sha256msg2<Arch>(a.to_native(), b.to_native()));
184 }
185 }
186
188 template<isa<x86> Arch> requires(!Arch.has(x86_feature::sha) &&
189 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
190 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha256msg2(
191 simd<std::uint32_t, 4, Arch> a, simd<std::uint32_t, 4, Arch> b) noexcept {
192 return detail::x86_sha_constant::message256_last(a, b);
193 }
194
196 template<isa<x86> Arch, class... Args>
197 void sha256msg2(Args...) = delete;
198
200}
201#endif
native_inline
#define native_inline
inline [[always_inline]]
Definition attributes.h:212
native_nodiscard
#define native_nodiscard
C++17 [[nodiscard]].
Definition attributes.h:189
native_const
#define native_const
[[const]] is not const
Definition attributes.h:108
native_target
#define native_target(x)
this indicates a required feature set for the current multiversioned function.
Definition attributes.h:476
native::sha256msg1
constexpr simd< std::uint32_t, 4, Arch > sha256msg1(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
First SHA-256 message-schedule step.
Definition native.x86.sha.ccm:152
native::sha1msg1
constexpr simd< std::uint32_t, 4, Arch > sha1msg1(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
First SHA-1 message-schedule step.
Definition native.x86.sha.ccm:77
native::sha256msg2
constexpr simd< std::uint32_t, 4, Arch > sha256msg2(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Final SHA-256 message-schedule step.
Definition native.x86.sha.ccm:177
native::sha1nexte
constexpr simd< std::uint32_t, 4, Arch > sha1nexte(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Add the next E value, derived from a, to the high dword of b.
Definition native.x86.sha.ccm:52
native::sha256rnds2
constexpr simd< std::uint32_t, 4, Arch > sha256rnds2(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > c) noexcept
Two SHA-256 rounds: a is CDGH, b is ABEF, c contains two message-plus-constant words.
Definition native.x86.sha.ccm:127
native::sha1rnds4
constexpr simd< std::uint32_t, 4, Arch > sha1rnds4(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Four SHA-1 rounds; Selector in [0,3] selects the function and constant.
Definition native.x86.sha.ccm:27
native::sha1msg2
constexpr simd< std::uint32_t, 4, Arch > sha1msg2(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Final SHA-1 message-schedule step.
Definition native.x86.sha.ccm:102
native.simd
native.x86.features
native.x86.sha
native
Architecture-tagged vectors, register packs and supporting value types. Native arithmetic follows its...
Definition native.arm.aes.ccm:10
std
Standard-library adaptations documented here for SIMD value types.
native::simd
Omitted architecture arguments use the native.simd provider's baseline.
Definition native.simd.ccm:19