native 0.0.1
Vectors, masks and wide register packs for C++26
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native.x86.vbmi2.ccm
1// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
2module;
3#include "native/isa_import.h"
4#include "native/x86/vbmi2.h"
5export module native.x86.vbmi2;
6export import native.x86.features;
7export import native.simd;
8// SPDX-License-Identifier: BSD-2-Clause OR Apache-2.0
9
10#if NATIVE_HOST_X86 || defined(NATIVE_DOXYGEN)
11export namespace native {
24
26 template<isa<x86> Arch>
27 requires(Arch.has(x86_feature::avx512f) &&
28 Arch.has(x86_feature::avx512bw) &&
29 Arch.has(x86_feature::avx512vbmi2) &&
30 Arch.has(x86_feature::avx512vl))
31 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
32 constexpr simd<std::uint8_t, 16, Arch> mask_vpcompressb(
33 simd<std::uint8_t, 16, Arch> source,
34 predicate<16, Arch> mask,
35 simd<std::uint8_t, 16, Arch> value) noexcept {
36 if consteval {
37 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
38 } else {
39 return simd<std::uint8_t, 16, Arch>::from_native(
40 detail::x86_vbmi2::mask_vpcompressb<Arch>(
41 source.to_native(), mask.to_bitset(), value.to_native()));
42 }
43 }
44
46 template<isa<x86> Arch>
47 requires(Arch.has(x86_feature::avx512f) &&
48 Arch.has(x86_feature::avx512bw) &&
49 Arch.has(x86_feature::avx512vbmi2) &&
50 Arch.has(x86_feature::avx512vl))
51 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
52 constexpr simd<std::uint8_t, 16, Arch> maskz_vpcompressb(
53 predicate<16, Arch> mask,
54 simd<std::uint8_t, 16, Arch> value) noexcept {
55 if consteval {
56 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint8_t, 16, Arch>{}, mask.to_bitset(), value);
57 } else {
58 return simd<std::uint8_t, 16, Arch>::from_native(
59 detail::x86_vbmi2::maskz_vpcompressb<Arch>(
60 mask.to_bitset(), value.to_native()));
61 }
62 }
63
65 template<isa<x86> Arch>
66 requires(Arch.has(x86_feature::avx512f) &&
67 Arch.has(x86_feature::avx512bw) &&
68 Arch.has(x86_feature::avx512vbmi2) &&
69 Arch.has(x86_feature::avx512vl))
70 native_inline native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
71 constexpr void mask_vpcompressb(
72 std::uint8_t * destination,
73 predicate<16, Arch> mask,
74 simd<std::uint8_t, 16, Arch> value) noexcept {
75 if consteval {
76 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
77 } else {
78 detail::x86_vbmi2::mask_vpcompressb<Arch>(
79 destination, mask.to_bitset(), value.to_native());
80 }
81 }
82
84 template<isa<x86> Arch>
85 requires(Arch.has(x86_feature::avx512f) &&
86 Arch.has(x86_feature::avx512bw) &&
87 Arch.has(x86_feature::avx512vbmi2) &&
88 Arch.has(x86_feature::avx512vl))
89 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
90 constexpr simd<std::uint8_t, 16, Arch> mask_vpexpandb(
91 simd<std::uint8_t, 16, Arch> source,
92 predicate<16, Arch> mask,
93 simd<std::uint8_t, 16, Arch> value) noexcept {
94 if consteval {
95 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
96 } else {
97 return simd<std::uint8_t, 16, Arch>::from_native(
98 detail::x86_vbmi2::mask_vpexpandb<Arch>(
99 source.to_native(), mask.to_bitset(), value.to_native()));
100 }
101 }
102
104 template<isa<x86> Arch>
105 requires(Arch.has(x86_feature::avx512f) &&
106 Arch.has(x86_feature::avx512bw) &&
107 Arch.has(x86_feature::avx512vbmi2) &&
108 Arch.has(x86_feature::avx512vl))
109 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
110 constexpr simd<std::uint8_t, 16, Arch> maskz_vpexpandb(
111 predicate<16, Arch> mask,
112 simd<std::uint8_t, 16, Arch> value) noexcept {
113 if consteval {
114 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint8_t, 16, Arch>{}, mask.to_bitset(), value);
115 } else {
116 return simd<std::uint8_t, 16, Arch>::from_native(
117 detail::x86_vbmi2::maskz_vpexpandb<Arch>(
118 mask.to_bitset(), value.to_native()));
119 }
120 }
121
123 template<isa<x86> Arch, class T>
124 requires(Arch.has(x86_feature::avx512f) &&
125 Arch.has(x86_feature::avx512bw) &&
126 Arch.has(x86_feature::avx512vbmi2) &&
127 Arch.has(x86_feature::avx512vl) &&
128 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>))
129 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
130 constexpr simd<std::uint8_t, 16, Arch> mask_vpexpandb(
131 simd<std::uint8_t, 16, Arch> source,
132 predicate<16, Arch> mask,
133 T * memory) noexcept {
134 if consteval {
135 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
136 } else {
137 return simd<std::uint8_t, 16, Arch>::from_native(
138 detail::x86_vbmi2::mask_vpexpandb<Arch>(
139 source.to_native(), mask.to_bitset(), memory));
140 }
141 }
142
144 template<isa<x86> Arch, class T>
145 requires(Arch.has(x86_feature::avx512f) &&
146 Arch.has(x86_feature::avx512bw) &&
147 Arch.has(x86_feature::avx512vbmi2) &&
148 Arch.has(x86_feature::avx512vl) &&
149 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>))
150 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
151 constexpr simd<std::uint8_t, 16, Arch> maskz_vpexpandb(
152 predicate<16, Arch> mask,
153 T * memory) noexcept {
154 if consteval {
155 return detail::x86_vbmi2_constant::expand_load(simd<std::uint8_t, 16, Arch>{}, mask.to_bitset(), memory);
156 } else {
157 return simd<std::uint8_t, 16, Arch>::from_native(
158 detail::x86_vbmi2::maskz_vpexpandb_128<Arch>(
159 static_cast<__mmask16>(mask.to_bitset()), memory));
160 }
161 }
162
164 template<isa<x86> Arch>
165 requires(Arch.has(x86_feature::avx512f) &&
166 Arch.has(x86_feature::avx512bw) &&
167 Arch.has(x86_feature::avx512vbmi2) &&
168 Arch.has(x86_feature::avx512vl))
169 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
170 constexpr simd<std::uint16_t, 8, Arch> mask_vpcompressw(
171 simd<std::uint16_t, 8, Arch> source,
172 predicate<8, Arch> mask,
173 simd<std::uint16_t, 8, Arch> value) noexcept {
174 if consteval {
175 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
176 } else {
177 return simd<std::uint16_t, 8, Arch>::from_native(
178 detail::x86_vbmi2::mask_vpcompressw<Arch>(
179 source.to_native(), mask.to_bitset(), value.to_native()));
180 }
181 }
182
184 template<isa<x86> Arch>
185 requires(Arch.has(x86_feature::avx512f) &&
186 Arch.has(x86_feature::avx512bw) &&
187 Arch.has(x86_feature::avx512vbmi2) &&
188 Arch.has(x86_feature::avx512vl))
189 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
190 constexpr simd<std::uint16_t, 8, Arch> maskz_vpcompressw(
191 predicate<8, Arch> mask,
192 simd<std::uint16_t, 8, Arch> value) noexcept {
193 if consteval {
194 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint16_t, 8, Arch>{}, mask.to_bitset(), value);
195 } else {
196 return simd<std::uint16_t, 8, Arch>::from_native(
197 detail::x86_vbmi2::maskz_vpcompressw<Arch>(
198 mask.to_bitset(), value.to_native()));
199 }
200 }
201
203 template<isa<x86> Arch>
204 requires(Arch.has(x86_feature::avx512f) &&
205 Arch.has(x86_feature::avx512bw) &&
206 Arch.has(x86_feature::avx512vbmi2) &&
207 Arch.has(x86_feature::avx512vl))
208 native_inline native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
209 constexpr void mask_vpcompressw(
210 std::uint16_t * destination,
211 predicate<8, Arch> mask,
212 simd<std::uint16_t, 8, Arch> value) noexcept {
213 if consteval {
214 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
215 } else {
216 detail::x86_vbmi2::mask_vpcompressw<Arch>(
217 destination, mask.to_bitset(), value.to_native());
218 }
219 }
220
222 template<isa<x86> Arch>
223 requires(Arch.has(x86_feature::avx512f) &&
224 Arch.has(x86_feature::avx512bw) &&
225 Arch.has(x86_feature::avx512vbmi2) &&
226 Arch.has(x86_feature::avx512vl))
227 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
228 constexpr simd<std::uint16_t, 8, Arch> mask_vpexpandw(
229 simd<std::uint16_t, 8, Arch> source,
230 predicate<8, Arch> mask,
231 simd<std::uint16_t, 8, Arch> value) noexcept {
232 if consteval {
233 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
234 } else {
235 return simd<std::uint16_t, 8, Arch>::from_native(
236 detail::x86_vbmi2::mask_vpexpandw<Arch>(
237 source.to_native(), mask.to_bitset(), value.to_native()));
238 }
239 }
240
242 template<isa<x86> Arch>
243 requires(Arch.has(x86_feature::avx512f) &&
244 Arch.has(x86_feature::avx512bw) &&
245 Arch.has(x86_feature::avx512vbmi2) &&
246 Arch.has(x86_feature::avx512vl))
247 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
248 constexpr simd<std::uint16_t, 8, Arch> maskz_vpexpandw(
249 predicate<8, Arch> mask,
250 simd<std::uint16_t, 8, Arch> value) noexcept {
251 if consteval {
252 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint16_t, 8, Arch>{}, mask.to_bitset(), value);
253 } else {
254 return simd<std::uint16_t, 8, Arch>::from_native(
255 detail::x86_vbmi2::maskz_vpexpandw<Arch>(
256 mask.to_bitset(), value.to_native()));
257 }
258 }
259
261 template<isa<x86> Arch, class T>
262 requires(Arch.has(x86_feature::avx512f) &&
263 Arch.has(x86_feature::avx512bw) &&
264 Arch.has(x86_feature::avx512vbmi2) &&
265 Arch.has(x86_feature::avx512vl) &&
266 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>))
267 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
268 constexpr simd<std::uint16_t, 8, Arch> mask_vpexpandw(
269 simd<std::uint16_t, 8, Arch> source,
270 predicate<8, Arch> mask,
271 T * memory) noexcept {
272 if consteval {
273 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
274 } else {
275 return simd<std::uint16_t, 8, Arch>::from_native(
276 detail::x86_vbmi2::mask_vpexpandw<Arch>(
277 source.to_native(), mask.to_bitset(), memory));
278 }
279 }
280
282 template<isa<x86> Arch, class T>
283 requires(Arch.has(x86_feature::avx512f) &&
284 Arch.has(x86_feature::avx512bw) &&
285 Arch.has(x86_feature::avx512vbmi2) &&
286 Arch.has(x86_feature::avx512vl) &&
287 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>))
288 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
289 constexpr simd<std::uint16_t, 8, Arch> maskz_vpexpandw(
290 predicate<8, Arch> mask,
291 T * memory) noexcept {
292 if consteval {
293 return detail::x86_vbmi2_constant::expand_load(simd<std::uint16_t, 8, Arch>{}, mask.to_bitset(), memory);
294 } else {
295 return simd<std::uint16_t, 8, Arch>::from_native(
296 detail::x86_vbmi2::maskz_vpexpandw_128<Arch>(
297 static_cast<__mmask8>(mask.to_bitset()), memory));
298 }
299 }
300
302 template<isa<x86> Arch, unsigned Imm8>
303 requires(Arch.has(x86_feature::avx512f) &&
304 Arch.has(x86_feature::avx512bw) &&
305 Arch.has(x86_feature::avx512vbmi2) &&
306 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
307 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
308 constexpr simd<std::uint16_t, 8, Arch> vpshldw(
309 simd<std::uint16_t, 8, Arch> a,
310 simd<std::uint16_t, 8, Arch> b) noexcept {
311 if consteval {
312 return detail::x86_vbmi2_constant::shift<false>(
313 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
314 } else {
315 return simd<std::uint16_t, 8, Arch>::from_native(
316 detail::x86_vbmi2::vpshldw<Arch, Imm8>(
317 a.to_native(), b.to_native()));
318 }
319 }
320
322 template<isa<x86> Arch, unsigned Imm8>
323 requires(Arch.has(x86_feature::avx512f) &&
324 Arch.has(x86_feature::avx512bw) &&
325 Arch.has(x86_feature::avx512vbmi2) &&
326 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
327 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
328 constexpr simd<std::uint16_t, 8, Arch> mask_vpshldw(
329 simd<std::uint16_t, 8, Arch> source,
330 predicate<8, Arch> mask,
331 simd<std::uint16_t, 8, Arch> a,
332 simd<std::uint16_t, 8, Arch> b) noexcept {
333 if consteval {
334 return detail::x86_vbmi2_constant::shift<false>(
335 a, b, Imm8, source, mask.to_bitset());
336 } else {
337 return simd<std::uint16_t, 8, Arch>::from_native(
338 detail::x86_vbmi2::mask_vpshldw<Arch, Imm8>(
339 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
340 }
341 }
342
344 template<isa<x86> Arch, unsigned Imm8>
345 requires(Arch.has(x86_feature::avx512f) &&
346 Arch.has(x86_feature::avx512bw) &&
347 Arch.has(x86_feature::avx512vbmi2) &&
348 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
349 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
350 constexpr simd<std::uint16_t, 8, Arch> maskz_vpshldw(
351 predicate<8, Arch> mask,
352 simd<std::uint16_t, 8, Arch> a,
353 simd<std::uint16_t, 8, Arch> b) noexcept {
354 if consteval {
355 return detail::x86_vbmi2_constant::shift<false>(
356 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
357 } else {
358 return simd<std::uint16_t, 8, Arch>::from_native(
359 detail::x86_vbmi2::maskz_vpshldw<Arch, Imm8>(
360 mask.to_bitset(), a.to_native(), b.to_native()));
361 }
362 }
363
365 template<isa<x86> Arch>
366 requires(Arch.has(x86_feature::avx512f) &&
367 Arch.has(x86_feature::avx512bw) &&
368 Arch.has(x86_feature::avx512vbmi2) &&
369 Arch.has(x86_feature::avx512vl))
370 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
371 constexpr simd<std::uint16_t, 8, Arch> vpshldvw(
372 simd<std::uint16_t, 8, Arch> a,
373 simd<std::uint16_t, 8, Arch> b,
374 simd<std::uint16_t, 8, Arch> counts) noexcept {
375 if consteval {
376 return detail::x86_vbmi2_constant::shift<false>(
377 a, b, counts, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
378 } else {
379 return simd<std::uint16_t, 8, Arch>::from_native(
380 detail::x86_vbmi2::vpshldvw<Arch>(
381 a.to_native(), b.to_native(), counts.to_native()));
382 }
383 }
384
386 template<isa<x86> Arch>
387 requires(Arch.has(x86_feature::avx512f) &&
388 Arch.has(x86_feature::avx512bw) &&
389 Arch.has(x86_feature::avx512vbmi2) &&
390 Arch.has(x86_feature::avx512vl))
391 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
392 constexpr simd<std::uint16_t, 8, Arch> mask_vpshldvw(
393 simd<std::uint16_t, 8, Arch> a,
394 predicate<8, Arch> mask,
395 simd<std::uint16_t, 8, Arch> b,
396 simd<std::uint16_t, 8, Arch> counts) noexcept {
397 if consteval {
398 return detail::x86_vbmi2_constant::shift<false>(
399 a, b, counts, a, mask.to_bitset());
400 } else {
401 return simd<std::uint16_t, 8, Arch>::from_native(
402 detail::x86_vbmi2::mask_vpshldvw<Arch>(
403 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
404 }
405 }
406
408 template<isa<x86> Arch>
409 requires(Arch.has(x86_feature::avx512f) &&
410 Arch.has(x86_feature::avx512bw) &&
411 Arch.has(x86_feature::avx512vbmi2) &&
412 Arch.has(x86_feature::avx512vl))
413 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
414 constexpr simd<std::uint16_t, 8, Arch> maskz_vpshldvw(
415 predicate<8, Arch> mask,
416 simd<std::uint16_t, 8, Arch> a,
417 simd<std::uint16_t, 8, Arch> b,
418 simd<std::uint16_t, 8, Arch> counts) noexcept {
419 if consteval {
420 return detail::x86_vbmi2_constant::shift<false>(
421 a, b, counts, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
422 } else {
423 return simd<std::uint16_t, 8, Arch>::from_native(
424 detail::x86_vbmi2::maskz_vpshldvw<Arch>(
425 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
426 }
427 }
428
430 template<isa<x86> Arch, unsigned Imm8>
431 requires(Arch.has(x86_feature::avx512f) &&
432 Arch.has(x86_feature::avx512bw) &&
433 Arch.has(x86_feature::avx512vbmi2) &&
434 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
435 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
436 constexpr simd<std::uint16_t, 8, Arch> vpshrdw(
437 simd<std::uint16_t, 8, Arch> a,
438 simd<std::uint16_t, 8, Arch> b) noexcept {
439 if consteval {
440 return detail::x86_vbmi2_constant::shift<true>(
441 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
442 } else {
443 return simd<std::uint16_t, 8, Arch>::from_native(
444 detail::x86_vbmi2::vpshrdw<Arch, Imm8>(
445 a.to_native(), b.to_native()));
446 }
447 }
448
450 template<isa<x86> Arch, unsigned Imm8>
451 requires(Arch.has(x86_feature::avx512f) &&
452 Arch.has(x86_feature::avx512bw) &&
453 Arch.has(x86_feature::avx512vbmi2) &&
454 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
455 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
456 constexpr simd<std::uint16_t, 8, Arch> mask_vpshrdw(
457 simd<std::uint16_t, 8, Arch> source,
458 predicate<8, Arch> mask,
459 simd<std::uint16_t, 8, Arch> a,
460 simd<std::uint16_t, 8, Arch> b) noexcept {
461 if consteval {
462 return detail::x86_vbmi2_constant::shift<true>(
463 a, b, Imm8, source, mask.to_bitset());
464 } else {
465 return simd<std::uint16_t, 8, Arch>::from_native(
466 detail::x86_vbmi2::mask_vpshrdw<Arch, Imm8>(
467 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
468 }
469 }
470
472 template<isa<x86> Arch, unsigned Imm8>
473 requires(Arch.has(x86_feature::avx512f) &&
474 Arch.has(x86_feature::avx512bw) &&
475 Arch.has(x86_feature::avx512vbmi2) &&
476 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
477 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
478 constexpr simd<std::uint16_t, 8, Arch> maskz_vpshrdw(
479 predicate<8, Arch> mask,
480 simd<std::uint16_t, 8, Arch> a,
481 simd<std::uint16_t, 8, Arch> b) noexcept {
482 if consteval {
483 return detail::x86_vbmi2_constant::shift<true>(
484 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
485 } else {
486 return simd<std::uint16_t, 8, Arch>::from_native(
487 detail::x86_vbmi2::maskz_vpshrdw<Arch, Imm8>(
488 mask.to_bitset(), a.to_native(), b.to_native()));
489 }
490 }
491
493 template<isa<x86> Arch>
494 requires(Arch.has(x86_feature::avx512f) &&
495 Arch.has(x86_feature::avx512bw) &&
496 Arch.has(x86_feature::avx512vbmi2) &&
497 Arch.has(x86_feature::avx512vl))
498 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
499 constexpr simd<std::uint16_t, 8, Arch> vpshrdvw(
500 simd<std::uint16_t, 8, Arch> a,
501 simd<std::uint16_t, 8, Arch> b,
502 simd<std::uint16_t, 8, Arch> counts) noexcept {
503 if consteval {
504 return detail::x86_vbmi2_constant::shift<true>(
505 a, b, counts, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
506 } else {
507 return simd<std::uint16_t, 8, Arch>::from_native(
508 detail::x86_vbmi2::vpshrdvw<Arch>(
509 a.to_native(), b.to_native(), counts.to_native()));
510 }
511 }
512
514 template<isa<x86> Arch>
515 requires(Arch.has(x86_feature::avx512f) &&
516 Arch.has(x86_feature::avx512bw) &&
517 Arch.has(x86_feature::avx512vbmi2) &&
518 Arch.has(x86_feature::avx512vl))
519 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
520 constexpr simd<std::uint16_t, 8, Arch> mask_vpshrdvw(
521 simd<std::uint16_t, 8, Arch> a,
522 predicate<8, Arch> mask,
523 simd<std::uint16_t, 8, Arch> b,
524 simd<std::uint16_t, 8, Arch> counts) noexcept {
525 if consteval {
526 return detail::x86_vbmi2_constant::shift<true>(
527 a, b, counts, a, mask.to_bitset());
528 } else {
529 return simd<std::uint16_t, 8, Arch>::from_native(
530 detail::x86_vbmi2::mask_vpshrdvw<Arch>(
531 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
532 }
533 }
534
536 template<isa<x86> Arch>
537 requires(Arch.has(x86_feature::avx512f) &&
538 Arch.has(x86_feature::avx512bw) &&
539 Arch.has(x86_feature::avx512vbmi2) &&
540 Arch.has(x86_feature::avx512vl))
541 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
542 constexpr simd<std::uint16_t, 8, Arch> maskz_vpshrdvw(
543 predicate<8, Arch> mask,
544 simd<std::uint16_t, 8, Arch> a,
545 simd<std::uint16_t, 8, Arch> b,
546 simd<std::uint16_t, 8, Arch> counts) noexcept {
547 if consteval {
548 return detail::x86_vbmi2_constant::shift<true>(
549 a, b, counts, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
550 } else {
551 return simd<std::uint16_t, 8, Arch>::from_native(
552 detail::x86_vbmi2::maskz_vpshrdvw<Arch>(
553 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
554 }
555 }
556
558 template<isa<x86> Arch, unsigned Imm8>
559 requires(Arch.has(x86_feature::avx512f) &&
560 Arch.has(x86_feature::avx512bw) &&
561 Arch.has(x86_feature::avx512vbmi2) &&
562 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
563 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
564 constexpr simd<std::uint32_t, 4, Arch> vpshldd(
565 simd<std::uint32_t, 4, Arch> a,
566 simd<std::uint32_t, 4, Arch> b) noexcept {
567 if consteval {
568 return detail::x86_vbmi2_constant::shift<false>(
569 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
570 } else {
571 return simd<std::uint32_t, 4, Arch>::from_native(
572 detail::x86_vbmi2::vpshldd<Arch, Imm8>(
573 a.to_native(), b.to_native()));
574 }
575 }
576
578 template<isa<x86> Arch, unsigned Imm8>
579 requires(Arch.has(x86_feature::avx512f) &&
580 Arch.has(x86_feature::avx512bw) &&
581 Arch.has(x86_feature::avx512vbmi2) &&
582 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
583 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
584 constexpr simd<std::uint32_t, 4, Arch> mask_vpshldd(
585 simd<std::uint32_t, 4, Arch> source,
586 predicate<4, Arch> mask,
587 simd<std::uint32_t, 4, Arch> a,
588 simd<std::uint32_t, 4, Arch> b) noexcept {
589 if consteval {
590 return detail::x86_vbmi2_constant::shift<false>(
591 a, b, Imm8, source, mask.to_bitset());
592 } else {
593 return simd<std::uint32_t, 4, Arch>::from_native(
594 detail::x86_vbmi2::mask_vpshldd<Arch, Imm8>(
595 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
596 }
597 }
598
600 template<isa<x86> Arch, unsigned Imm8>
601 requires(Arch.has(x86_feature::avx512f) &&
602 Arch.has(x86_feature::avx512bw) &&
603 Arch.has(x86_feature::avx512vbmi2) &&
604 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
605 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
606 constexpr simd<std::uint32_t, 4, Arch> maskz_vpshldd(
607 predicate<4, Arch> mask,
608 simd<std::uint32_t, 4, Arch> a,
609 simd<std::uint32_t, 4, Arch> b) noexcept {
610 if consteval {
611 return detail::x86_vbmi2_constant::shift<false>(
612 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
613 } else {
614 return simd<std::uint32_t, 4, Arch>::from_native(
615 detail::x86_vbmi2::maskz_vpshldd<Arch, Imm8>(
616 mask.to_bitset(), a.to_native(), b.to_native()));
617 }
618 }
619
621 template<isa<x86> Arch>
622 requires(Arch.has(x86_feature::avx512f) &&
623 Arch.has(x86_feature::avx512bw) &&
624 Arch.has(x86_feature::avx512vbmi2) &&
625 Arch.has(x86_feature::avx512vl))
626 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
627 constexpr simd<std::uint32_t, 4, Arch> vpshldvd(
628 simd<std::uint32_t, 4, Arch> a,
629 simd<std::uint32_t, 4, Arch> b,
630 simd<std::uint32_t, 4, Arch> counts) noexcept {
631 if consteval {
632 return detail::x86_vbmi2_constant::shift<false>(
633 a, b, counts, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
634 } else {
635 return simd<std::uint32_t, 4, Arch>::from_native(
636 detail::x86_vbmi2::vpshldvd<Arch>(
637 a.to_native(), b.to_native(), counts.to_native()));
638 }
639 }
640
642 template<isa<x86> Arch>
643 requires(Arch.has(x86_feature::avx512f) &&
644 Arch.has(x86_feature::avx512bw) &&
645 Arch.has(x86_feature::avx512vbmi2) &&
646 Arch.has(x86_feature::avx512vl))
647 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
648 constexpr simd<std::uint32_t, 4, Arch> mask_vpshldvd(
649 simd<std::uint32_t, 4, Arch> a,
650 predicate<4, Arch> mask,
651 simd<std::uint32_t, 4, Arch> b,
652 simd<std::uint32_t, 4, Arch> counts) noexcept {
653 if consteval {
654 return detail::x86_vbmi2_constant::shift<false>(
655 a, b, counts, a, mask.to_bitset());
656 } else {
657 return simd<std::uint32_t, 4, Arch>::from_native(
658 detail::x86_vbmi2::mask_vpshldvd<Arch>(
659 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
660 }
661 }
662
664 template<isa<x86> Arch>
665 requires(Arch.has(x86_feature::avx512f) &&
666 Arch.has(x86_feature::avx512bw) &&
667 Arch.has(x86_feature::avx512vbmi2) &&
668 Arch.has(x86_feature::avx512vl))
669 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
670 constexpr simd<std::uint32_t, 4, Arch> maskz_vpshldvd(
671 predicate<4, Arch> mask,
672 simd<std::uint32_t, 4, Arch> a,
673 simd<std::uint32_t, 4, Arch> b,
674 simd<std::uint32_t, 4, Arch> counts) noexcept {
675 if consteval {
676 return detail::x86_vbmi2_constant::shift<false>(
677 a, b, counts, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
678 } else {
679 return simd<std::uint32_t, 4, Arch>::from_native(
680 detail::x86_vbmi2::maskz_vpshldvd<Arch>(
681 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
682 }
683 }
684
686 template<isa<x86> Arch, unsigned Imm8>
687 requires(Arch.has(x86_feature::avx512f) &&
688 Arch.has(x86_feature::avx512bw) &&
689 Arch.has(x86_feature::avx512vbmi2) &&
690 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
691 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
692 constexpr simd<std::uint32_t, 4, Arch> vpshrdd(
693 simd<std::uint32_t, 4, Arch> a,
694 simd<std::uint32_t, 4, Arch> b) noexcept {
695 if consteval {
696 return detail::x86_vbmi2_constant::shift<true>(
697 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
698 } else {
699 return simd<std::uint32_t, 4, Arch>::from_native(
700 detail::x86_vbmi2::vpshrdd<Arch, Imm8>(
701 a.to_native(), b.to_native()));
702 }
703 }
704
706 template<isa<x86> Arch, unsigned Imm8>
707 requires(Arch.has(x86_feature::avx512f) &&
708 Arch.has(x86_feature::avx512bw) &&
709 Arch.has(x86_feature::avx512vbmi2) &&
710 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
711 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
712 constexpr simd<std::uint32_t, 4, Arch> mask_vpshrdd(
713 simd<std::uint32_t, 4, Arch> source,
714 predicate<4, Arch> mask,
715 simd<std::uint32_t, 4, Arch> a,
716 simd<std::uint32_t, 4, Arch> b) noexcept {
717 if consteval {
718 return detail::x86_vbmi2_constant::shift<true>(
719 a, b, Imm8, source, mask.to_bitset());
720 } else {
721 return simd<std::uint32_t, 4, Arch>::from_native(
722 detail::x86_vbmi2::mask_vpshrdd<Arch, Imm8>(
723 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
724 }
725 }
726
728 template<isa<x86> Arch, unsigned Imm8>
729 requires(Arch.has(x86_feature::avx512f) &&
730 Arch.has(x86_feature::avx512bw) &&
731 Arch.has(x86_feature::avx512vbmi2) &&
732 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
733 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
734 constexpr simd<std::uint32_t, 4, Arch> maskz_vpshrdd(
735 predicate<4, Arch> mask,
736 simd<std::uint32_t, 4, Arch> a,
737 simd<std::uint32_t, 4, Arch> b) noexcept {
738 if consteval {
739 return detail::x86_vbmi2_constant::shift<true>(
740 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
741 } else {
742 return simd<std::uint32_t, 4, Arch>::from_native(
743 detail::x86_vbmi2::maskz_vpshrdd<Arch, Imm8>(
744 mask.to_bitset(), a.to_native(), b.to_native()));
745 }
746 }
747
749 template<isa<x86> Arch>
750 requires(Arch.has(x86_feature::avx512f) &&
751 Arch.has(x86_feature::avx512bw) &&
752 Arch.has(x86_feature::avx512vbmi2) &&
753 Arch.has(x86_feature::avx512vl))
754 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
755 constexpr simd<std::uint32_t, 4, Arch> vpshrdvd(
756 simd<std::uint32_t, 4, Arch> a,
757 simd<std::uint32_t, 4, Arch> b,
758 simd<std::uint32_t, 4, Arch> counts) noexcept {
759 if consteval {
760 return detail::x86_vbmi2_constant::shift<true>(
761 a, b, counts, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
762 } else {
763 return simd<std::uint32_t, 4, Arch>::from_native(
764 detail::x86_vbmi2::vpshrdvd<Arch>(
765 a.to_native(), b.to_native(), counts.to_native()));
766 }
767 }
768
770 template<isa<x86> Arch>
771 requires(Arch.has(x86_feature::avx512f) &&
772 Arch.has(x86_feature::avx512bw) &&
773 Arch.has(x86_feature::avx512vbmi2) &&
774 Arch.has(x86_feature::avx512vl))
775 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
776 constexpr simd<std::uint32_t, 4, Arch> mask_vpshrdvd(
777 simd<std::uint32_t, 4, Arch> a,
778 predicate<4, Arch> mask,
779 simd<std::uint32_t, 4, Arch> b,
780 simd<std::uint32_t, 4, Arch> counts) noexcept {
781 if consteval {
782 return detail::x86_vbmi2_constant::shift<true>(
783 a, b, counts, a, mask.to_bitset());
784 } else {
785 return simd<std::uint32_t, 4, Arch>::from_native(
786 detail::x86_vbmi2::mask_vpshrdvd<Arch>(
787 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
788 }
789 }
790
792 template<isa<x86> Arch>
793 requires(Arch.has(x86_feature::avx512f) &&
794 Arch.has(x86_feature::avx512bw) &&
795 Arch.has(x86_feature::avx512vbmi2) &&
796 Arch.has(x86_feature::avx512vl))
797 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
798 constexpr simd<std::uint32_t, 4, Arch> maskz_vpshrdvd(
799 predicate<4, Arch> mask,
800 simd<std::uint32_t, 4, Arch> a,
801 simd<std::uint32_t, 4, Arch> b,
802 simd<std::uint32_t, 4, Arch> counts) noexcept {
803 if consteval {
804 return detail::x86_vbmi2_constant::shift<true>(
805 a, b, counts, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
806 } else {
807 return simd<std::uint32_t, 4, Arch>::from_native(
808 detail::x86_vbmi2::maskz_vpshrdvd<Arch>(
809 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
810 }
811 }
812
814 template<isa<x86> Arch, unsigned Imm8>
815 requires(Arch.has(x86_feature::avx512f) &&
816 Arch.has(x86_feature::avx512bw) &&
817 Arch.has(x86_feature::avx512vbmi2) &&
818 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
819 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
820 constexpr simd<std::uint64_t, 2, Arch> vpshldq(
821 simd<std::uint64_t, 2, Arch> a,
822 simd<std::uint64_t, 2, Arch> b) noexcept {
823 if consteval {
824 return detail::x86_vbmi2_constant::shift<false>(
825 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
826 } else {
827 return simd<std::uint64_t, 2, Arch>::from_native(
828 detail::x86_vbmi2::vpshldq<Arch, Imm8>(
829 a.to_native(), b.to_native()));
830 }
831 }
832
834 template<isa<x86> Arch, unsigned Imm8>
835 requires(Arch.has(x86_feature::avx512f) &&
836 Arch.has(x86_feature::avx512bw) &&
837 Arch.has(x86_feature::avx512vbmi2) &&
838 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
839 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
840 constexpr simd<std::uint64_t, 2, Arch> mask_vpshldq(
841 simd<std::uint64_t, 2, Arch> source,
842 predicate<2, Arch> mask,
843 simd<std::uint64_t, 2, Arch> a,
844 simd<std::uint64_t, 2, Arch> b) noexcept {
845 if consteval {
846 return detail::x86_vbmi2_constant::shift<false>(
847 a, b, Imm8, source, mask.to_bitset());
848 } else {
849 return simd<std::uint64_t, 2, Arch>::from_native(
850 detail::x86_vbmi2::mask_vpshldq<Arch, Imm8>(
851 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
852 }
853 }
854
856 template<isa<x86> Arch, unsigned Imm8>
857 requires(Arch.has(x86_feature::avx512f) &&
858 Arch.has(x86_feature::avx512bw) &&
859 Arch.has(x86_feature::avx512vbmi2) &&
860 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
861 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
862 constexpr simd<std::uint64_t, 2, Arch> maskz_vpshldq(
863 predicate<2, Arch> mask,
864 simd<std::uint64_t, 2, Arch> a,
865 simd<std::uint64_t, 2, Arch> b) noexcept {
866 if consteval {
867 return detail::x86_vbmi2_constant::shift<false>(
868 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
869 } else {
870 return simd<std::uint64_t, 2, Arch>::from_native(
871 detail::x86_vbmi2::maskz_vpshldq<Arch, Imm8>(
872 mask.to_bitset(), a.to_native(), b.to_native()));
873 }
874 }
875
877 template<isa<x86> Arch>
878 requires(Arch.has(x86_feature::avx512f) &&
879 Arch.has(x86_feature::avx512bw) &&
880 Arch.has(x86_feature::avx512vbmi2) &&
881 Arch.has(x86_feature::avx512vl))
882 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
883 constexpr simd<std::uint64_t, 2, Arch> vpshldvq(
884 simd<std::uint64_t, 2, Arch> a,
885 simd<std::uint64_t, 2, Arch> b,
886 simd<std::uint64_t, 2, Arch> counts) noexcept {
887 if consteval {
888 return detail::x86_vbmi2_constant::shift<false>(
889 a, b, counts, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
890 } else {
891 return simd<std::uint64_t, 2, Arch>::from_native(
892 detail::x86_vbmi2::vpshldvq<Arch>(
893 a.to_native(), b.to_native(), counts.to_native()));
894 }
895 }
896
898 template<isa<x86> Arch>
899 requires(Arch.has(x86_feature::avx512f) &&
900 Arch.has(x86_feature::avx512bw) &&
901 Arch.has(x86_feature::avx512vbmi2) &&
902 Arch.has(x86_feature::avx512vl))
903 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
904 constexpr simd<std::uint64_t, 2, Arch> mask_vpshldvq(
905 simd<std::uint64_t, 2, Arch> a,
906 predicate<2, Arch> mask,
907 simd<std::uint64_t, 2, Arch> b,
908 simd<std::uint64_t, 2, Arch> counts) noexcept {
909 if consteval {
910 return detail::x86_vbmi2_constant::shift<false>(
911 a, b, counts, a, mask.to_bitset());
912 } else {
913 return simd<std::uint64_t, 2, Arch>::from_native(
914 detail::x86_vbmi2::mask_vpshldvq<Arch>(
915 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
916 }
917 }
918
920 template<isa<x86> Arch>
921 requires(Arch.has(x86_feature::avx512f) &&
922 Arch.has(x86_feature::avx512bw) &&
923 Arch.has(x86_feature::avx512vbmi2) &&
924 Arch.has(x86_feature::avx512vl))
925 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
926 constexpr simd<std::uint64_t, 2, Arch> maskz_vpshldvq(
927 predicate<2, Arch> mask,
928 simd<std::uint64_t, 2, Arch> a,
929 simd<std::uint64_t, 2, Arch> b,
930 simd<std::uint64_t, 2, Arch> counts) noexcept {
931 if consteval {
932 return detail::x86_vbmi2_constant::shift<false>(
933 a, b, counts, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
934 } else {
935 return simd<std::uint64_t, 2, Arch>::from_native(
936 detail::x86_vbmi2::maskz_vpshldvq<Arch>(
937 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
938 }
939 }
940
942 template<isa<x86> Arch, unsigned Imm8>
943 requires(Arch.has(x86_feature::avx512f) &&
944 Arch.has(x86_feature::avx512bw) &&
945 Arch.has(x86_feature::avx512vbmi2) &&
946 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
947 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
948 constexpr simd<std::uint64_t, 2, Arch> vpshrdq(
949 simd<std::uint64_t, 2, Arch> a,
950 simd<std::uint64_t, 2, Arch> b) noexcept {
951 if consteval {
952 return detail::x86_vbmi2_constant::shift<true>(
953 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
954 } else {
955 return simd<std::uint64_t, 2, Arch>::from_native(
956 detail::x86_vbmi2::vpshrdq<Arch, Imm8>(
957 a.to_native(), b.to_native()));
958 }
959 }
960
962 template<isa<x86> Arch, unsigned Imm8>
963 requires(Arch.has(x86_feature::avx512f) &&
964 Arch.has(x86_feature::avx512bw) &&
965 Arch.has(x86_feature::avx512vbmi2) &&
966 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
967 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
968 constexpr simd<std::uint64_t, 2, Arch> mask_vpshrdq(
969 simd<std::uint64_t, 2, Arch> source,
970 predicate<2, Arch> mask,
971 simd<std::uint64_t, 2, Arch> a,
972 simd<std::uint64_t, 2, Arch> b) noexcept {
973 if consteval {
974 return detail::x86_vbmi2_constant::shift<true>(
975 a, b, Imm8, source, mask.to_bitset());
976 } else {
977 return simd<std::uint64_t, 2, Arch>::from_native(
978 detail::x86_vbmi2::mask_vpshrdq<Arch, Imm8>(
979 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
980 }
981 }
982
984 template<isa<x86> Arch, unsigned Imm8>
985 requires(Arch.has(x86_feature::avx512f) &&
986 Arch.has(x86_feature::avx512bw) &&
987 Arch.has(x86_feature::avx512vbmi2) &&
988 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
989 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
990 constexpr simd<std::uint64_t, 2, Arch> maskz_vpshrdq(
991 predicate<2, Arch> mask,
992 simd<std::uint64_t, 2, Arch> a,
993 simd<std::uint64_t, 2, Arch> b) noexcept {
994 if consteval {
995 return detail::x86_vbmi2_constant::shift<true>(
996 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
997 } else {
998 return simd<std::uint64_t, 2, Arch>::from_native(
999 detail::x86_vbmi2::maskz_vpshrdq<Arch, Imm8>(
1000 mask.to_bitset(), a.to_native(), b.to_native()));
1001 }
1002 }
1003
1005 template<isa<x86> Arch>
1006 requires(Arch.has(x86_feature::avx512f) &&
1007 Arch.has(x86_feature::avx512bw) &&
1008 Arch.has(x86_feature::avx512vbmi2) &&
1009 Arch.has(x86_feature::avx512vl))
1010 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1011 constexpr simd<std::uint64_t, 2, Arch> vpshrdvq(
1012 simd<std::uint64_t, 2, Arch> a,
1013 simd<std::uint64_t, 2, Arch> b,
1014 simd<std::uint64_t, 2, Arch> counts) noexcept {
1015 if consteval {
1016 return detail::x86_vbmi2_constant::shift<true>(
1017 a, b, counts, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
1018 } else {
1019 return simd<std::uint64_t, 2, Arch>::from_native(
1020 detail::x86_vbmi2::vpshrdvq<Arch>(
1021 a.to_native(), b.to_native(), counts.to_native()));
1022 }
1023 }
1024
1026 template<isa<x86> Arch>
1027 requires(Arch.has(x86_feature::avx512f) &&
1028 Arch.has(x86_feature::avx512bw) &&
1029 Arch.has(x86_feature::avx512vbmi2) &&
1030 Arch.has(x86_feature::avx512vl))
1031 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1032 constexpr simd<std::uint64_t, 2, Arch> mask_vpshrdvq(
1033 simd<std::uint64_t, 2, Arch> a,
1034 predicate<2, Arch> mask,
1035 simd<std::uint64_t, 2, Arch> b,
1036 simd<std::uint64_t, 2, Arch> counts) noexcept {
1037 if consteval {
1038 return detail::x86_vbmi2_constant::shift<true>(
1039 a, b, counts, a, mask.to_bitset());
1040 } else {
1041 return simd<std::uint64_t, 2, Arch>::from_native(
1042 detail::x86_vbmi2::mask_vpshrdvq<Arch>(
1043 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
1044 }
1045 }
1046
1048 template<isa<x86> Arch>
1049 requires(Arch.has(x86_feature::avx512f) &&
1050 Arch.has(x86_feature::avx512bw) &&
1051 Arch.has(x86_feature::avx512vbmi2) &&
1052 Arch.has(x86_feature::avx512vl))
1053 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1054 constexpr simd<std::uint64_t, 2, Arch> maskz_vpshrdvq(
1055 predicate<2, Arch> mask,
1056 simd<std::uint64_t, 2, Arch> a,
1057 simd<std::uint64_t, 2, Arch> b,
1058 simd<std::uint64_t, 2, Arch> counts) noexcept {
1059 if consteval {
1060 return detail::x86_vbmi2_constant::shift<true>(
1061 a, b, counts, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
1062 } else {
1063 return simd<std::uint64_t, 2, Arch>::from_native(
1064 detail::x86_vbmi2::maskz_vpshrdvq<Arch>(
1065 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
1066 }
1067 }
1068
1070 template<isa<x86> Arch>
1071 requires(Arch.has(x86_feature::avx512f) &&
1072 Arch.has(x86_feature::avx512bw) &&
1073 Arch.has(x86_feature::avx512vbmi2) &&
1074 Arch.has(x86_feature::avx512vl))
1075 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1076 constexpr simd<std::uint8_t, 32, Arch> mask_vpcompressb(
1077 simd<std::uint8_t, 32, Arch> source,
1078 predicate<32, Arch> mask,
1079 simd<std::uint8_t, 32, Arch> value) noexcept {
1080 if consteval {
1081 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
1082 } else {
1083 return simd<std::uint8_t, 32, Arch>::from_native(
1084 detail::x86_vbmi2::mask_vpcompressb<Arch>(
1085 source.to_native(), mask.to_bitset(), value.to_native()));
1086 }
1087 }
1088
1090 template<isa<x86> Arch>
1091 requires(Arch.has(x86_feature::avx512f) &&
1092 Arch.has(x86_feature::avx512bw) &&
1093 Arch.has(x86_feature::avx512vbmi2) &&
1094 Arch.has(x86_feature::avx512vl))
1095 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1096 constexpr simd<std::uint8_t, 32, Arch> maskz_vpcompressb(
1097 predicate<32, Arch> mask,
1098 simd<std::uint8_t, 32, Arch> value) noexcept {
1099 if consteval {
1100 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint8_t, 32, Arch>{}, mask.to_bitset(), value);
1101 } else {
1102 return simd<std::uint8_t, 32, Arch>::from_native(
1103 detail::x86_vbmi2::maskz_vpcompressb<Arch>(
1104 mask.to_bitset(), value.to_native()));
1105 }
1106 }
1107
1109 template<isa<x86> Arch>
1110 requires(Arch.has(x86_feature::avx512f) &&
1111 Arch.has(x86_feature::avx512bw) &&
1112 Arch.has(x86_feature::avx512vbmi2) &&
1113 Arch.has(x86_feature::avx512vl))
1114 native_inline native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1115 constexpr void mask_vpcompressb(
1116 std::uint8_t * destination,
1117 predicate<32, Arch> mask,
1118 simd<std::uint8_t, 32, Arch> value) noexcept {
1119 if consteval {
1120 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
1121 } else {
1122 detail::x86_vbmi2::mask_vpcompressb<Arch>(
1123 destination, mask.to_bitset(), value.to_native());
1124 }
1125 }
1126
1128 template<isa<x86> Arch>
1129 requires(Arch.has(x86_feature::avx512f) &&
1130 Arch.has(x86_feature::avx512bw) &&
1131 Arch.has(x86_feature::avx512vbmi2) &&
1132 Arch.has(x86_feature::avx512vl))
1133 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1134 constexpr simd<std::uint8_t, 32, Arch> mask_vpexpandb(
1135 simd<std::uint8_t, 32, Arch> source,
1136 predicate<32, Arch> mask,
1137 simd<std::uint8_t, 32, Arch> value) noexcept {
1138 if consteval {
1139 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
1140 } else {
1141 return simd<std::uint8_t, 32, Arch>::from_native(
1142 detail::x86_vbmi2::mask_vpexpandb<Arch>(
1143 source.to_native(), mask.to_bitset(), value.to_native()));
1144 }
1145 }
1146
1148 template<isa<x86> Arch>
1149 requires(Arch.has(x86_feature::avx512f) &&
1150 Arch.has(x86_feature::avx512bw) &&
1151 Arch.has(x86_feature::avx512vbmi2) &&
1152 Arch.has(x86_feature::avx512vl))
1153 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1154 constexpr simd<std::uint8_t, 32, Arch> maskz_vpexpandb(
1155 predicate<32, Arch> mask,
1156 simd<std::uint8_t, 32, Arch> value) noexcept {
1157 if consteval {
1158 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint8_t, 32, Arch>{}, mask.to_bitset(), value);
1159 } else {
1160 return simd<std::uint8_t, 32, Arch>::from_native(
1161 detail::x86_vbmi2::maskz_vpexpandb<Arch>(
1162 mask.to_bitset(), value.to_native()));
1163 }
1164 }
1165
1167 template<isa<x86> Arch, class T>
1168 requires(Arch.has(x86_feature::avx512f) &&
1169 Arch.has(x86_feature::avx512bw) &&
1170 Arch.has(x86_feature::avx512vbmi2) &&
1171 Arch.has(x86_feature::avx512vl) &&
1172 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>))
1173 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1174 constexpr simd<std::uint8_t, 32, Arch> mask_vpexpandb(
1175 simd<std::uint8_t, 32, Arch> source,
1176 predicate<32, Arch> mask,
1177 T * memory) noexcept {
1178 if consteval {
1179 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
1180 } else {
1181 return simd<std::uint8_t, 32, Arch>::from_native(
1182 detail::x86_vbmi2::mask_vpexpandb<Arch>(
1183 source.to_native(), mask.to_bitset(), memory));
1184 }
1185 }
1186
1188 template<isa<x86> Arch, class T>
1189 requires(Arch.has(x86_feature::avx512f) &&
1190 Arch.has(x86_feature::avx512bw) &&
1191 Arch.has(x86_feature::avx512vbmi2) &&
1192 Arch.has(x86_feature::avx512vl) &&
1193 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>))
1194 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1195 constexpr simd<std::uint8_t, 32, Arch> maskz_vpexpandb(
1196 predicate<32, Arch> mask,
1197 T * memory) noexcept {
1198 if consteval {
1199 return detail::x86_vbmi2_constant::expand_load(simd<std::uint8_t, 32, Arch>{}, mask.to_bitset(), memory);
1200 } else {
1201 return simd<std::uint8_t, 32, Arch>::from_native(
1202 detail::x86_vbmi2::maskz_vpexpandb_256<Arch>(
1203 static_cast<__mmask32>(mask.to_bitset()), memory));
1204 }
1205 }
1206
1208 template<isa<x86> Arch>
1209 requires(Arch.has(x86_feature::avx512f) &&
1210 Arch.has(x86_feature::avx512bw) &&
1211 Arch.has(x86_feature::avx512vbmi2) &&
1212 Arch.has(x86_feature::avx512vl))
1213 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1214 constexpr simd<std::uint16_t, 16, Arch> mask_vpcompressw(
1215 simd<std::uint16_t, 16, Arch> source,
1216 predicate<16, Arch> mask,
1217 simd<std::uint16_t, 16, Arch> value) noexcept {
1218 if consteval {
1219 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
1220 } else {
1221 return simd<std::uint16_t, 16, Arch>::from_native(
1222 detail::x86_vbmi2::mask_vpcompressw<Arch>(
1223 source.to_native(), mask.to_bitset(), value.to_native()));
1224 }
1225 }
1226
1228 template<isa<x86> Arch>
1229 requires(Arch.has(x86_feature::avx512f) &&
1230 Arch.has(x86_feature::avx512bw) &&
1231 Arch.has(x86_feature::avx512vbmi2) &&
1232 Arch.has(x86_feature::avx512vl))
1233 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1234 constexpr simd<std::uint16_t, 16, Arch> maskz_vpcompressw(
1235 predicate<16, Arch> mask,
1236 simd<std::uint16_t, 16, Arch> value) noexcept {
1237 if consteval {
1238 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint16_t, 16, Arch>{}, mask.to_bitset(), value);
1239 } else {
1240 return simd<std::uint16_t, 16, Arch>::from_native(
1241 detail::x86_vbmi2::maskz_vpcompressw<Arch>(
1242 mask.to_bitset(), value.to_native()));
1243 }
1244 }
1245
1247 template<isa<x86> Arch>
1248 requires(Arch.has(x86_feature::avx512f) &&
1249 Arch.has(x86_feature::avx512bw) &&
1250 Arch.has(x86_feature::avx512vbmi2) &&
1251 Arch.has(x86_feature::avx512vl))
1252 native_inline native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1253 constexpr void mask_vpcompressw(
1254 std::uint16_t * destination,
1255 predicate<16, Arch> mask,
1256 simd<std::uint16_t, 16, Arch> value) noexcept {
1257 if consteval {
1258 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
1259 } else {
1260 detail::x86_vbmi2::mask_vpcompressw<Arch>(
1261 destination, mask.to_bitset(), value.to_native());
1262 }
1263 }
1264
1266 template<isa<x86> Arch>
1267 requires(Arch.has(x86_feature::avx512f) &&
1268 Arch.has(x86_feature::avx512bw) &&
1269 Arch.has(x86_feature::avx512vbmi2) &&
1270 Arch.has(x86_feature::avx512vl))
1271 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1272 constexpr simd<std::uint16_t, 16, Arch> mask_vpexpandw(
1273 simd<std::uint16_t, 16, Arch> source,
1274 predicate<16, Arch> mask,
1275 simd<std::uint16_t, 16, Arch> value) noexcept {
1276 if consteval {
1277 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
1278 } else {
1279 return simd<std::uint16_t, 16, Arch>::from_native(
1280 detail::x86_vbmi2::mask_vpexpandw<Arch>(
1281 source.to_native(), mask.to_bitset(), value.to_native()));
1282 }
1283 }
1284
1286 template<isa<x86> Arch>
1287 requires(Arch.has(x86_feature::avx512f) &&
1288 Arch.has(x86_feature::avx512bw) &&
1289 Arch.has(x86_feature::avx512vbmi2) &&
1290 Arch.has(x86_feature::avx512vl))
1291 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1292 constexpr simd<std::uint16_t, 16, Arch> maskz_vpexpandw(
1293 predicate<16, Arch> mask,
1294 simd<std::uint16_t, 16, Arch> value) noexcept {
1295 if consteval {
1296 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint16_t, 16, Arch>{}, mask.to_bitset(), value);
1297 } else {
1298 return simd<std::uint16_t, 16, Arch>::from_native(
1299 detail::x86_vbmi2::maskz_vpexpandw<Arch>(
1300 mask.to_bitset(), value.to_native()));
1301 }
1302 }
1303
1305 template<isa<x86> Arch, class T>
1306 requires(Arch.has(x86_feature::avx512f) &&
1307 Arch.has(x86_feature::avx512bw) &&
1308 Arch.has(x86_feature::avx512vbmi2) &&
1309 Arch.has(x86_feature::avx512vl) &&
1310 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>))
1311 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1312 constexpr simd<std::uint16_t, 16, Arch> mask_vpexpandw(
1313 simd<std::uint16_t, 16, Arch> source,
1314 predicate<16, Arch> mask,
1315 T * memory) noexcept {
1316 if consteval {
1317 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
1318 } else {
1319 return simd<std::uint16_t, 16, Arch>::from_native(
1320 detail::x86_vbmi2::mask_vpexpandw<Arch>(
1321 source.to_native(), mask.to_bitset(), memory));
1322 }
1323 }
1324
1326 template<isa<x86> Arch, class T>
1327 requires(Arch.has(x86_feature::avx512f) &&
1328 Arch.has(x86_feature::avx512bw) &&
1329 Arch.has(x86_feature::avx512vbmi2) &&
1330 Arch.has(x86_feature::avx512vl) &&
1331 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>))
1332 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1333 constexpr simd<std::uint16_t, 16, Arch> maskz_vpexpandw(
1334 predicate<16, Arch> mask,
1335 T * memory) noexcept {
1336 if consteval {
1337 return detail::x86_vbmi2_constant::expand_load(simd<std::uint16_t, 16, Arch>{}, mask.to_bitset(), memory);
1338 } else {
1339 return simd<std::uint16_t, 16, Arch>::from_native(
1340 detail::x86_vbmi2::maskz_vpexpandw_256<Arch>(
1341 static_cast<__mmask16>(mask.to_bitset()), memory));
1342 }
1343 }
1344
1346 template<isa<x86> Arch, unsigned Imm8>
1347 requires(Arch.has(x86_feature::avx512f) &&
1348 Arch.has(x86_feature::avx512bw) &&
1349 Arch.has(x86_feature::avx512vbmi2) &&
1350 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1351 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1352 constexpr simd<std::uint16_t, 16, Arch> vpshldw(
1353 simd<std::uint16_t, 16, Arch> a,
1354 simd<std::uint16_t, 16, Arch> b) noexcept {
1355 if consteval {
1356 return detail::x86_vbmi2_constant::shift<false>(
1357 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
1358 } else {
1359 return simd<std::uint16_t, 16, Arch>::from_native(
1360 detail::x86_vbmi2::vpshldw<Arch, Imm8>(
1361 a.to_native(), b.to_native()));
1362 }
1363 }
1364
1366 template<isa<x86> Arch, unsigned Imm8>
1367 requires(Arch.has(x86_feature::avx512f) &&
1368 Arch.has(x86_feature::avx512bw) &&
1369 Arch.has(x86_feature::avx512vbmi2) &&
1370 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1371 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1372 constexpr simd<std::uint16_t, 16, Arch> mask_vpshldw(
1373 simd<std::uint16_t, 16, Arch> source,
1374 predicate<16, Arch> mask,
1375 simd<std::uint16_t, 16, Arch> a,
1376 simd<std::uint16_t, 16, Arch> b) noexcept {
1377 if consteval {
1378 return detail::x86_vbmi2_constant::shift<false>(
1379 a, b, Imm8, source, mask.to_bitset());
1380 } else {
1381 return simd<std::uint16_t, 16, Arch>::from_native(
1382 detail::x86_vbmi2::mask_vpshldw<Arch, Imm8>(
1383 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
1384 }
1385 }
1386
1388 template<isa<x86> Arch, unsigned Imm8>
1389 requires(Arch.has(x86_feature::avx512f) &&
1390 Arch.has(x86_feature::avx512bw) &&
1391 Arch.has(x86_feature::avx512vbmi2) &&
1392 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1393 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1394 constexpr simd<std::uint16_t, 16, Arch> maskz_vpshldw(
1395 predicate<16, Arch> mask,
1396 simd<std::uint16_t, 16, Arch> a,
1397 simd<std::uint16_t, 16, Arch> b) noexcept {
1398 if consteval {
1399 return detail::x86_vbmi2_constant::shift<false>(
1400 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
1401 } else {
1402 return simd<std::uint16_t, 16, Arch>::from_native(
1403 detail::x86_vbmi2::maskz_vpshldw<Arch, Imm8>(
1404 mask.to_bitset(), a.to_native(), b.to_native()));
1405 }
1406 }
1407
1409 template<isa<x86> Arch>
1410 requires(Arch.has(x86_feature::avx512f) &&
1411 Arch.has(x86_feature::avx512bw) &&
1412 Arch.has(x86_feature::avx512vbmi2) &&
1413 Arch.has(x86_feature::avx512vl))
1414 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1415 constexpr simd<std::uint16_t, 16, Arch> vpshldvw(
1416 simd<std::uint16_t, 16, Arch> a,
1417 simd<std::uint16_t, 16, Arch> b,
1418 simd<std::uint16_t, 16, Arch> counts) noexcept {
1419 if consteval {
1420 return detail::x86_vbmi2_constant::shift<false>(
1421 a, b, counts, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
1422 } else {
1423 return simd<std::uint16_t, 16, Arch>::from_native(
1424 detail::x86_vbmi2::vpshldvw<Arch>(
1425 a.to_native(), b.to_native(), counts.to_native()));
1426 }
1427 }
1428
1430 template<isa<x86> Arch>
1431 requires(Arch.has(x86_feature::avx512f) &&
1432 Arch.has(x86_feature::avx512bw) &&
1433 Arch.has(x86_feature::avx512vbmi2) &&
1434 Arch.has(x86_feature::avx512vl))
1435 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1436 constexpr simd<std::uint16_t, 16, Arch> mask_vpshldvw(
1437 simd<std::uint16_t, 16, Arch> a,
1438 predicate<16, Arch> mask,
1439 simd<std::uint16_t, 16, Arch> b,
1440 simd<std::uint16_t, 16, Arch> counts) noexcept {
1441 if consteval {
1442 return detail::x86_vbmi2_constant::shift<false>(
1443 a, b, counts, a, mask.to_bitset());
1444 } else {
1445 return simd<std::uint16_t, 16, Arch>::from_native(
1446 detail::x86_vbmi2::mask_vpshldvw<Arch>(
1447 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
1448 }
1449 }
1450
1452 template<isa<x86> Arch>
1453 requires(Arch.has(x86_feature::avx512f) &&
1454 Arch.has(x86_feature::avx512bw) &&
1455 Arch.has(x86_feature::avx512vbmi2) &&
1456 Arch.has(x86_feature::avx512vl))
1457 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1458 constexpr simd<std::uint16_t, 16, Arch> maskz_vpshldvw(
1459 predicate<16, Arch> mask,
1460 simd<std::uint16_t, 16, Arch> a,
1461 simd<std::uint16_t, 16, Arch> b,
1462 simd<std::uint16_t, 16, Arch> counts) noexcept {
1463 if consteval {
1464 return detail::x86_vbmi2_constant::shift<false>(
1465 a, b, counts, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
1466 } else {
1467 return simd<std::uint16_t, 16, Arch>::from_native(
1468 detail::x86_vbmi2::maskz_vpshldvw<Arch>(
1469 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
1470 }
1471 }
1472
1474 template<isa<x86> Arch, unsigned Imm8>
1475 requires(Arch.has(x86_feature::avx512f) &&
1476 Arch.has(x86_feature::avx512bw) &&
1477 Arch.has(x86_feature::avx512vbmi2) &&
1478 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1479 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1480 constexpr simd<std::uint16_t, 16, Arch> vpshrdw(
1481 simd<std::uint16_t, 16, Arch> a,
1482 simd<std::uint16_t, 16, Arch> b) noexcept {
1483 if consteval {
1484 return detail::x86_vbmi2_constant::shift<true>(
1485 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
1486 } else {
1487 return simd<std::uint16_t, 16, Arch>::from_native(
1488 detail::x86_vbmi2::vpshrdw<Arch, Imm8>(
1489 a.to_native(), b.to_native()));
1490 }
1491 }
1492
1494 template<isa<x86> Arch, unsigned Imm8>
1495 requires(Arch.has(x86_feature::avx512f) &&
1496 Arch.has(x86_feature::avx512bw) &&
1497 Arch.has(x86_feature::avx512vbmi2) &&
1498 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1499 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1500 constexpr simd<std::uint16_t, 16, Arch> mask_vpshrdw(
1501 simd<std::uint16_t, 16, Arch> source,
1502 predicate<16, Arch> mask,
1503 simd<std::uint16_t, 16, Arch> a,
1504 simd<std::uint16_t, 16, Arch> b) noexcept {
1505 if consteval {
1506 return detail::x86_vbmi2_constant::shift<true>(
1507 a, b, Imm8, source, mask.to_bitset());
1508 } else {
1509 return simd<std::uint16_t, 16, Arch>::from_native(
1510 detail::x86_vbmi2::mask_vpshrdw<Arch, Imm8>(
1511 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
1512 }
1513 }
1514
1516 template<isa<x86> Arch, unsigned Imm8>
1517 requires(Arch.has(x86_feature::avx512f) &&
1518 Arch.has(x86_feature::avx512bw) &&
1519 Arch.has(x86_feature::avx512vbmi2) &&
1520 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1521 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1522 constexpr simd<std::uint16_t, 16, Arch> maskz_vpshrdw(
1523 predicate<16, Arch> mask,
1524 simd<std::uint16_t, 16, Arch> a,
1525 simd<std::uint16_t, 16, Arch> b) noexcept {
1526 if consteval {
1527 return detail::x86_vbmi2_constant::shift<true>(
1528 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
1529 } else {
1530 return simd<std::uint16_t, 16, Arch>::from_native(
1531 detail::x86_vbmi2::maskz_vpshrdw<Arch, Imm8>(
1532 mask.to_bitset(), a.to_native(), b.to_native()));
1533 }
1534 }
1535
1537 template<isa<x86> Arch>
1538 requires(Arch.has(x86_feature::avx512f) &&
1539 Arch.has(x86_feature::avx512bw) &&
1540 Arch.has(x86_feature::avx512vbmi2) &&
1541 Arch.has(x86_feature::avx512vl))
1542 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1543 constexpr simd<std::uint16_t, 16, Arch> vpshrdvw(
1544 simd<std::uint16_t, 16, Arch> a,
1545 simd<std::uint16_t, 16, Arch> b,
1546 simd<std::uint16_t, 16, Arch> counts) noexcept {
1547 if consteval {
1548 return detail::x86_vbmi2_constant::shift<true>(
1549 a, b, counts, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
1550 } else {
1551 return simd<std::uint16_t, 16, Arch>::from_native(
1552 detail::x86_vbmi2::vpshrdvw<Arch>(
1553 a.to_native(), b.to_native(), counts.to_native()));
1554 }
1555 }
1556
1558 template<isa<x86> Arch>
1559 requires(Arch.has(x86_feature::avx512f) &&
1560 Arch.has(x86_feature::avx512bw) &&
1561 Arch.has(x86_feature::avx512vbmi2) &&
1562 Arch.has(x86_feature::avx512vl))
1563 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1564 constexpr simd<std::uint16_t, 16, Arch> mask_vpshrdvw(
1565 simd<std::uint16_t, 16, Arch> a,
1566 predicate<16, Arch> mask,
1567 simd<std::uint16_t, 16, Arch> b,
1568 simd<std::uint16_t, 16, Arch> counts) noexcept {
1569 if consteval {
1570 return detail::x86_vbmi2_constant::shift<true>(
1571 a, b, counts, a, mask.to_bitset());
1572 } else {
1573 return simd<std::uint16_t, 16, Arch>::from_native(
1574 detail::x86_vbmi2::mask_vpshrdvw<Arch>(
1575 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
1576 }
1577 }
1578
1580 template<isa<x86> Arch>
1581 requires(Arch.has(x86_feature::avx512f) &&
1582 Arch.has(x86_feature::avx512bw) &&
1583 Arch.has(x86_feature::avx512vbmi2) &&
1584 Arch.has(x86_feature::avx512vl))
1585 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1586 constexpr simd<std::uint16_t, 16, Arch> maskz_vpshrdvw(
1587 predicate<16, Arch> mask,
1588 simd<std::uint16_t, 16, Arch> a,
1589 simd<std::uint16_t, 16, Arch> b,
1590 simd<std::uint16_t, 16, Arch> counts) noexcept {
1591 if consteval {
1592 return detail::x86_vbmi2_constant::shift<true>(
1593 a, b, counts, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
1594 } else {
1595 return simd<std::uint16_t, 16, Arch>::from_native(
1596 detail::x86_vbmi2::maskz_vpshrdvw<Arch>(
1597 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
1598 }
1599 }
1600
1602 template<isa<x86> Arch, unsigned Imm8>
1603 requires(Arch.has(x86_feature::avx512f) &&
1604 Arch.has(x86_feature::avx512bw) &&
1605 Arch.has(x86_feature::avx512vbmi2) &&
1606 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1607 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1608 constexpr simd<std::uint32_t, 8, Arch> vpshldd(
1609 simd<std::uint32_t, 8, Arch> a,
1610 simd<std::uint32_t, 8, Arch> b) noexcept {
1611 if consteval {
1612 return detail::x86_vbmi2_constant::shift<false>(
1613 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
1614 } else {
1615 return simd<std::uint32_t, 8, Arch>::from_native(
1616 detail::x86_vbmi2::vpshldd<Arch, Imm8>(
1617 a.to_native(), b.to_native()));
1618 }
1619 }
1620
1622 template<isa<x86> Arch, unsigned Imm8>
1623 requires(Arch.has(x86_feature::avx512f) &&
1624 Arch.has(x86_feature::avx512bw) &&
1625 Arch.has(x86_feature::avx512vbmi2) &&
1626 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1627 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1628 constexpr simd<std::uint32_t, 8, Arch> mask_vpshldd(
1629 simd<std::uint32_t, 8, Arch> source,
1630 predicate<8, Arch> mask,
1631 simd<std::uint32_t, 8, Arch> a,
1632 simd<std::uint32_t, 8, Arch> b) noexcept {
1633 if consteval {
1634 return detail::x86_vbmi2_constant::shift<false>(
1635 a, b, Imm8, source, mask.to_bitset());
1636 } else {
1637 return simd<std::uint32_t, 8, Arch>::from_native(
1638 detail::x86_vbmi2::mask_vpshldd<Arch, Imm8>(
1639 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
1640 }
1641 }
1642
1644 template<isa<x86> Arch, unsigned Imm8>
1645 requires(Arch.has(x86_feature::avx512f) &&
1646 Arch.has(x86_feature::avx512bw) &&
1647 Arch.has(x86_feature::avx512vbmi2) &&
1648 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1649 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1650 constexpr simd<std::uint32_t, 8, Arch> maskz_vpshldd(
1651 predicate<8, Arch> mask,
1652 simd<std::uint32_t, 8, Arch> a,
1653 simd<std::uint32_t, 8, Arch> b) noexcept {
1654 if consteval {
1655 return detail::x86_vbmi2_constant::shift<false>(
1656 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
1657 } else {
1658 return simd<std::uint32_t, 8, Arch>::from_native(
1659 detail::x86_vbmi2::maskz_vpshldd<Arch, Imm8>(
1660 mask.to_bitset(), a.to_native(), b.to_native()));
1661 }
1662 }
1663
1665 template<isa<x86> Arch>
1666 requires(Arch.has(x86_feature::avx512f) &&
1667 Arch.has(x86_feature::avx512bw) &&
1668 Arch.has(x86_feature::avx512vbmi2) &&
1669 Arch.has(x86_feature::avx512vl))
1670 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1671 constexpr simd<std::uint32_t, 8, Arch> vpshldvd(
1672 simd<std::uint32_t, 8, Arch> a,
1673 simd<std::uint32_t, 8, Arch> b,
1674 simd<std::uint32_t, 8, Arch> counts) noexcept {
1675 if consteval {
1676 return detail::x86_vbmi2_constant::shift<false>(
1677 a, b, counts, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
1678 } else {
1679 return simd<std::uint32_t, 8, Arch>::from_native(
1680 detail::x86_vbmi2::vpshldvd<Arch>(
1681 a.to_native(), b.to_native(), counts.to_native()));
1682 }
1683 }
1684
1686 template<isa<x86> Arch>
1687 requires(Arch.has(x86_feature::avx512f) &&
1688 Arch.has(x86_feature::avx512bw) &&
1689 Arch.has(x86_feature::avx512vbmi2) &&
1690 Arch.has(x86_feature::avx512vl))
1691 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1692 constexpr simd<std::uint32_t, 8, Arch> mask_vpshldvd(
1693 simd<std::uint32_t, 8, Arch> a,
1694 predicate<8, Arch> mask,
1695 simd<std::uint32_t, 8, Arch> b,
1696 simd<std::uint32_t, 8, Arch> counts) noexcept {
1697 if consteval {
1698 return detail::x86_vbmi2_constant::shift<false>(
1699 a, b, counts, a, mask.to_bitset());
1700 } else {
1701 return simd<std::uint32_t, 8, Arch>::from_native(
1702 detail::x86_vbmi2::mask_vpshldvd<Arch>(
1703 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
1704 }
1705 }
1706
1708 template<isa<x86> Arch>
1709 requires(Arch.has(x86_feature::avx512f) &&
1710 Arch.has(x86_feature::avx512bw) &&
1711 Arch.has(x86_feature::avx512vbmi2) &&
1712 Arch.has(x86_feature::avx512vl))
1713 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1714 constexpr simd<std::uint32_t, 8, Arch> maskz_vpshldvd(
1715 predicate<8, Arch> mask,
1716 simd<std::uint32_t, 8, Arch> a,
1717 simd<std::uint32_t, 8, Arch> b,
1718 simd<std::uint32_t, 8, Arch> counts) noexcept {
1719 if consteval {
1720 return detail::x86_vbmi2_constant::shift<false>(
1721 a, b, counts, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
1722 } else {
1723 return simd<std::uint32_t, 8, Arch>::from_native(
1724 detail::x86_vbmi2::maskz_vpshldvd<Arch>(
1725 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
1726 }
1727 }
1728
1730 template<isa<x86> Arch, unsigned Imm8>
1731 requires(Arch.has(x86_feature::avx512f) &&
1732 Arch.has(x86_feature::avx512bw) &&
1733 Arch.has(x86_feature::avx512vbmi2) &&
1734 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1735 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1736 constexpr simd<std::uint32_t, 8, Arch> vpshrdd(
1737 simd<std::uint32_t, 8, Arch> a,
1738 simd<std::uint32_t, 8, Arch> b) noexcept {
1739 if consteval {
1740 return detail::x86_vbmi2_constant::shift<true>(
1741 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
1742 } else {
1743 return simd<std::uint32_t, 8, Arch>::from_native(
1744 detail::x86_vbmi2::vpshrdd<Arch, Imm8>(
1745 a.to_native(), b.to_native()));
1746 }
1747 }
1748
1750 template<isa<x86> Arch, unsigned Imm8>
1751 requires(Arch.has(x86_feature::avx512f) &&
1752 Arch.has(x86_feature::avx512bw) &&
1753 Arch.has(x86_feature::avx512vbmi2) &&
1754 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1755 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1756 constexpr simd<std::uint32_t, 8, Arch> mask_vpshrdd(
1757 simd<std::uint32_t, 8, Arch> source,
1758 predicate<8, Arch> mask,
1759 simd<std::uint32_t, 8, Arch> a,
1760 simd<std::uint32_t, 8, Arch> b) noexcept {
1761 if consteval {
1762 return detail::x86_vbmi2_constant::shift<true>(
1763 a, b, Imm8, source, mask.to_bitset());
1764 } else {
1765 return simd<std::uint32_t, 8, Arch>::from_native(
1766 detail::x86_vbmi2::mask_vpshrdd<Arch, Imm8>(
1767 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
1768 }
1769 }
1770
1772 template<isa<x86> Arch, unsigned Imm8>
1773 requires(Arch.has(x86_feature::avx512f) &&
1774 Arch.has(x86_feature::avx512bw) &&
1775 Arch.has(x86_feature::avx512vbmi2) &&
1776 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1777 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1778 constexpr simd<std::uint32_t, 8, Arch> maskz_vpshrdd(
1779 predicate<8, Arch> mask,
1780 simd<std::uint32_t, 8, Arch> a,
1781 simd<std::uint32_t, 8, Arch> b) noexcept {
1782 if consteval {
1783 return detail::x86_vbmi2_constant::shift<true>(
1784 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
1785 } else {
1786 return simd<std::uint32_t, 8, Arch>::from_native(
1787 detail::x86_vbmi2::maskz_vpshrdd<Arch, Imm8>(
1788 mask.to_bitset(), a.to_native(), b.to_native()));
1789 }
1790 }
1791
1793 template<isa<x86> Arch>
1794 requires(Arch.has(x86_feature::avx512f) &&
1795 Arch.has(x86_feature::avx512bw) &&
1796 Arch.has(x86_feature::avx512vbmi2) &&
1797 Arch.has(x86_feature::avx512vl))
1798 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1799 constexpr simd<std::uint32_t, 8, Arch> vpshrdvd(
1800 simd<std::uint32_t, 8, Arch> a,
1801 simd<std::uint32_t, 8, Arch> b,
1802 simd<std::uint32_t, 8, Arch> counts) noexcept {
1803 if consteval {
1804 return detail::x86_vbmi2_constant::shift<true>(
1805 a, b, counts, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
1806 } else {
1807 return simd<std::uint32_t, 8, Arch>::from_native(
1808 detail::x86_vbmi2::vpshrdvd<Arch>(
1809 a.to_native(), b.to_native(), counts.to_native()));
1810 }
1811 }
1812
1814 template<isa<x86> Arch>
1815 requires(Arch.has(x86_feature::avx512f) &&
1816 Arch.has(x86_feature::avx512bw) &&
1817 Arch.has(x86_feature::avx512vbmi2) &&
1818 Arch.has(x86_feature::avx512vl))
1819 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1820 constexpr simd<std::uint32_t, 8, Arch> mask_vpshrdvd(
1821 simd<std::uint32_t, 8, Arch> a,
1822 predicate<8, Arch> mask,
1823 simd<std::uint32_t, 8, Arch> b,
1824 simd<std::uint32_t, 8, Arch> counts) noexcept {
1825 if consteval {
1826 return detail::x86_vbmi2_constant::shift<true>(
1827 a, b, counts, a, mask.to_bitset());
1828 } else {
1829 return simd<std::uint32_t, 8, Arch>::from_native(
1830 detail::x86_vbmi2::mask_vpshrdvd<Arch>(
1831 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
1832 }
1833 }
1834
1836 template<isa<x86> Arch>
1837 requires(Arch.has(x86_feature::avx512f) &&
1838 Arch.has(x86_feature::avx512bw) &&
1839 Arch.has(x86_feature::avx512vbmi2) &&
1840 Arch.has(x86_feature::avx512vl))
1841 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1842 constexpr simd<std::uint32_t, 8, Arch> maskz_vpshrdvd(
1843 predicate<8, Arch> mask,
1844 simd<std::uint32_t, 8, Arch> a,
1845 simd<std::uint32_t, 8, Arch> b,
1846 simd<std::uint32_t, 8, Arch> counts) noexcept {
1847 if consteval {
1848 return detail::x86_vbmi2_constant::shift<true>(
1849 a, b, counts, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
1850 } else {
1851 return simd<std::uint32_t, 8, Arch>::from_native(
1852 detail::x86_vbmi2::maskz_vpshrdvd<Arch>(
1853 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
1854 }
1855 }
1856
1858 template<isa<x86> Arch, unsigned Imm8>
1859 requires(Arch.has(x86_feature::avx512f) &&
1860 Arch.has(x86_feature::avx512bw) &&
1861 Arch.has(x86_feature::avx512vbmi2) &&
1862 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1863 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1864 constexpr simd<std::uint64_t, 4, Arch> vpshldq(
1865 simd<std::uint64_t, 4, Arch> a,
1866 simd<std::uint64_t, 4, Arch> b) noexcept {
1867 if consteval {
1868 return detail::x86_vbmi2_constant::shift<false>(
1869 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
1870 } else {
1871 return simd<std::uint64_t, 4, Arch>::from_native(
1872 detail::x86_vbmi2::vpshldq<Arch, Imm8>(
1873 a.to_native(), b.to_native()));
1874 }
1875 }
1876
1878 template<isa<x86> Arch, unsigned Imm8>
1879 requires(Arch.has(x86_feature::avx512f) &&
1880 Arch.has(x86_feature::avx512bw) &&
1881 Arch.has(x86_feature::avx512vbmi2) &&
1882 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1883 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1884 constexpr simd<std::uint64_t, 4, Arch> mask_vpshldq(
1885 simd<std::uint64_t, 4, Arch> source,
1886 predicate<4, Arch> mask,
1887 simd<std::uint64_t, 4, Arch> a,
1888 simd<std::uint64_t, 4, Arch> b) noexcept {
1889 if consteval {
1890 return detail::x86_vbmi2_constant::shift<false>(
1891 a, b, Imm8, source, mask.to_bitset());
1892 } else {
1893 return simd<std::uint64_t, 4, Arch>::from_native(
1894 detail::x86_vbmi2::mask_vpshldq<Arch, Imm8>(
1895 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
1896 }
1897 }
1898
1900 template<isa<x86> Arch, unsigned Imm8>
1901 requires(Arch.has(x86_feature::avx512f) &&
1902 Arch.has(x86_feature::avx512bw) &&
1903 Arch.has(x86_feature::avx512vbmi2) &&
1904 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1905 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1906 constexpr simd<std::uint64_t, 4, Arch> maskz_vpshldq(
1907 predicate<4, Arch> mask,
1908 simd<std::uint64_t, 4, Arch> a,
1909 simd<std::uint64_t, 4, Arch> b) noexcept {
1910 if consteval {
1911 return detail::x86_vbmi2_constant::shift<false>(
1912 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
1913 } else {
1914 return simd<std::uint64_t, 4, Arch>::from_native(
1915 detail::x86_vbmi2::maskz_vpshldq<Arch, Imm8>(
1916 mask.to_bitset(), a.to_native(), b.to_native()));
1917 }
1918 }
1919
1921 template<isa<x86> Arch>
1922 requires(Arch.has(x86_feature::avx512f) &&
1923 Arch.has(x86_feature::avx512bw) &&
1924 Arch.has(x86_feature::avx512vbmi2) &&
1925 Arch.has(x86_feature::avx512vl))
1926 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1927 constexpr simd<std::uint64_t, 4, Arch> vpshldvq(
1928 simd<std::uint64_t, 4, Arch> a,
1929 simd<std::uint64_t, 4, Arch> b,
1930 simd<std::uint64_t, 4, Arch> counts) noexcept {
1931 if consteval {
1932 return detail::x86_vbmi2_constant::shift<false>(
1933 a, b, counts, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
1934 } else {
1935 return simd<std::uint64_t, 4, Arch>::from_native(
1936 detail::x86_vbmi2::vpshldvq<Arch>(
1937 a.to_native(), b.to_native(), counts.to_native()));
1938 }
1939 }
1940
1942 template<isa<x86> Arch>
1943 requires(Arch.has(x86_feature::avx512f) &&
1944 Arch.has(x86_feature::avx512bw) &&
1945 Arch.has(x86_feature::avx512vbmi2) &&
1946 Arch.has(x86_feature::avx512vl))
1947 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1948 constexpr simd<std::uint64_t, 4, Arch> mask_vpshldvq(
1949 simd<std::uint64_t, 4, Arch> a,
1950 predicate<4, Arch> mask,
1951 simd<std::uint64_t, 4, Arch> b,
1952 simd<std::uint64_t, 4, Arch> counts) noexcept {
1953 if consteval {
1954 return detail::x86_vbmi2_constant::shift<false>(
1955 a, b, counts, a, mask.to_bitset());
1956 } else {
1957 return simd<std::uint64_t, 4, Arch>::from_native(
1958 detail::x86_vbmi2::mask_vpshldvq<Arch>(
1959 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
1960 }
1961 }
1962
1964 template<isa<x86> Arch>
1965 requires(Arch.has(x86_feature::avx512f) &&
1966 Arch.has(x86_feature::avx512bw) &&
1967 Arch.has(x86_feature::avx512vbmi2) &&
1968 Arch.has(x86_feature::avx512vl))
1969 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1970 constexpr simd<std::uint64_t, 4, Arch> maskz_vpshldvq(
1971 predicate<4, Arch> mask,
1972 simd<std::uint64_t, 4, Arch> a,
1973 simd<std::uint64_t, 4, Arch> b,
1974 simd<std::uint64_t, 4, Arch> counts) noexcept {
1975 if consteval {
1976 return detail::x86_vbmi2_constant::shift<false>(
1977 a, b, counts, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
1978 } else {
1979 return simd<std::uint64_t, 4, Arch>::from_native(
1980 detail::x86_vbmi2::maskz_vpshldvq<Arch>(
1981 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
1982 }
1983 }
1984
1986 template<isa<x86> Arch, unsigned Imm8>
1987 requires(Arch.has(x86_feature::avx512f) &&
1988 Arch.has(x86_feature::avx512bw) &&
1989 Arch.has(x86_feature::avx512vbmi2) &&
1990 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
1991 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
1992 constexpr simd<std::uint64_t, 4, Arch> vpshrdq(
1993 simd<std::uint64_t, 4, Arch> a,
1994 simd<std::uint64_t, 4, Arch> b) noexcept {
1995 if consteval {
1996 return detail::x86_vbmi2_constant::shift<true>(
1997 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
1998 } else {
1999 return simd<std::uint64_t, 4, Arch>::from_native(
2000 detail::x86_vbmi2::vpshrdq<Arch, Imm8>(
2001 a.to_native(), b.to_native()));
2002 }
2003 }
2004
2006 template<isa<x86> Arch, unsigned Imm8>
2007 requires(Arch.has(x86_feature::avx512f) &&
2008 Arch.has(x86_feature::avx512bw) &&
2009 Arch.has(x86_feature::avx512vbmi2) &&
2010 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
2011 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
2012 constexpr simd<std::uint64_t, 4, Arch> mask_vpshrdq(
2013 simd<std::uint64_t, 4, Arch> source,
2014 predicate<4, Arch> mask,
2015 simd<std::uint64_t, 4, Arch> a,
2016 simd<std::uint64_t, 4, Arch> b) noexcept {
2017 if consteval {
2018 return detail::x86_vbmi2_constant::shift<true>(
2019 a, b, Imm8, source, mask.to_bitset());
2020 } else {
2021 return simd<std::uint64_t, 4, Arch>::from_native(
2022 detail::x86_vbmi2::mask_vpshrdq<Arch, Imm8>(
2023 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
2024 }
2025 }
2026
2028 template<isa<x86> Arch, unsigned Imm8>
2029 requires(Arch.has(x86_feature::avx512f) &&
2030 Arch.has(x86_feature::avx512bw) &&
2031 Arch.has(x86_feature::avx512vbmi2) &&
2032 Arch.has(x86_feature::avx512vl) && Imm8 <= 255)
2033 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
2034 constexpr simd<std::uint64_t, 4, Arch> maskz_vpshrdq(
2035 predicate<4, Arch> mask,
2036 simd<std::uint64_t, 4, Arch> a,
2037 simd<std::uint64_t, 4, Arch> b) noexcept {
2038 if consteval {
2039 return detail::x86_vbmi2_constant::shift<true>(
2040 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
2041 } else {
2042 return simd<std::uint64_t, 4, Arch>::from_native(
2043 detail::x86_vbmi2::maskz_vpshrdq<Arch, Imm8>(
2044 mask.to_bitset(), a.to_native(), b.to_native()));
2045 }
2046 }
2047
2049 template<isa<x86> Arch>
2050 requires(Arch.has(x86_feature::avx512f) &&
2051 Arch.has(x86_feature::avx512bw) &&
2052 Arch.has(x86_feature::avx512vbmi2) &&
2053 Arch.has(x86_feature::avx512vl))
2054 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
2055 constexpr simd<std::uint64_t, 4, Arch> vpshrdvq(
2056 simd<std::uint64_t, 4, Arch> a,
2057 simd<std::uint64_t, 4, Arch> b,
2058 simd<std::uint64_t, 4, Arch> counts) noexcept {
2059 if consteval {
2060 return detail::x86_vbmi2_constant::shift<true>(
2061 a, b, counts, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
2062 } else {
2063 return simd<std::uint64_t, 4, Arch>::from_native(
2064 detail::x86_vbmi2::vpshrdvq<Arch>(
2065 a.to_native(), b.to_native(), counts.to_native()));
2066 }
2067 }
2068
2070 template<isa<x86> Arch>
2071 requires(Arch.has(x86_feature::avx512f) &&
2072 Arch.has(x86_feature::avx512bw) &&
2073 Arch.has(x86_feature::avx512vbmi2) &&
2074 Arch.has(x86_feature::avx512vl))
2075 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
2076 constexpr simd<std::uint64_t, 4, Arch> mask_vpshrdvq(
2077 simd<std::uint64_t, 4, Arch> a,
2078 predicate<4, Arch> mask,
2079 simd<std::uint64_t, 4, Arch> b,
2080 simd<std::uint64_t, 4, Arch> counts) noexcept {
2081 if consteval {
2082 return detail::x86_vbmi2_constant::shift<true>(
2083 a, b, counts, a, mask.to_bitset());
2084 } else {
2085 return simd<std::uint64_t, 4, Arch>::from_native(
2086 detail::x86_vbmi2::mask_vpshrdvq<Arch>(
2087 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
2088 }
2089 }
2090
2092 template<isa<x86> Arch>
2093 requires(Arch.has(x86_feature::avx512f) &&
2094 Arch.has(x86_feature::avx512bw) &&
2095 Arch.has(x86_feature::avx512vbmi2) &&
2096 Arch.has(x86_feature::avx512vl))
2097 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2,avx512vl")
2098 constexpr simd<std::uint64_t, 4, Arch> maskz_vpshrdvq(
2099 predicate<4, Arch> mask,
2100 simd<std::uint64_t, 4, Arch> a,
2101 simd<std::uint64_t, 4, Arch> b,
2102 simd<std::uint64_t, 4, Arch> counts) noexcept {
2103 if consteval {
2104 return detail::x86_vbmi2_constant::shift<true>(
2105 a, b, counts, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
2106 } else {
2107 return simd<std::uint64_t, 4, Arch>::from_native(
2108 detail::x86_vbmi2::maskz_vpshrdvq<Arch>(
2109 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
2110 }
2111 }
2112
2114 template<isa<x86> Arch>
2115 requires(Arch.has(x86_feature::avx512f) &&
2116 Arch.has(x86_feature::avx512bw) &&
2117 Arch.has(x86_feature::avx512vbmi2))
2118 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2119 constexpr simd<std::uint8_t, 64, Arch> mask_vpcompressb(
2120 simd<std::uint8_t, 64, Arch> source,
2121 predicate<64, Arch> mask,
2122 simd<std::uint8_t, 64, Arch> value) noexcept {
2123 if consteval {
2124 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
2125 } else {
2126 return simd<std::uint8_t, 64, Arch>::from_native(
2127 detail::x86_vbmi2::mask_vpcompressb<Arch>(
2128 source.to_native(), mask.to_bitset(), value.to_native()));
2129 }
2130 }
2131
2133 template<isa<x86> Arch>
2134 requires(Arch.has(x86_feature::avx512f) &&
2135 Arch.has(x86_feature::avx512bw) &&
2136 Arch.has(x86_feature::avx512vbmi2))
2137 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2138 constexpr simd<std::uint8_t, 64, Arch> maskz_vpcompressb(
2139 predicate<64, Arch> mask,
2140 simd<std::uint8_t, 64, Arch> value) noexcept {
2141 if consteval {
2142 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint8_t, 64, Arch>{}, mask.to_bitset(), value);
2143 } else {
2144 return simd<std::uint8_t, 64, Arch>::from_native(
2145 detail::x86_vbmi2::maskz_vpcompressb<Arch>(
2146 mask.to_bitset(), value.to_native()));
2147 }
2148 }
2149
2151 template<isa<x86> Arch>
2152 requires(Arch.has(x86_feature::avx512f) &&
2153 Arch.has(x86_feature::avx512bw) &&
2154 Arch.has(x86_feature::avx512vbmi2))
2155 native_inline native_target("avx512f,avx512bw,avx512vbmi2")
2156 constexpr void mask_vpcompressb(
2157 std::uint8_t * destination,
2158 predicate<64, Arch> mask,
2159 simd<std::uint8_t, 64, Arch> value) noexcept {
2160 if consteval {
2161 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
2162 } else {
2163 detail::x86_vbmi2::mask_vpcompressb<Arch>(
2164 destination, mask.to_bitset(), value.to_native());
2165 }
2166 }
2167
2169 template<isa<x86> Arch>
2170 requires(Arch.has(x86_feature::avx512f) &&
2171 Arch.has(x86_feature::avx512bw) &&
2172 Arch.has(x86_feature::avx512vbmi2))
2173 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2174 constexpr simd<std::uint8_t, 64, Arch> mask_vpexpandb(
2175 simd<std::uint8_t, 64, Arch> source,
2176 predicate<64, Arch> mask,
2177 simd<std::uint8_t, 64, Arch> value) noexcept {
2178 if consteval {
2179 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
2180 } else {
2181 return simd<std::uint8_t, 64, Arch>::from_native(
2182 detail::x86_vbmi2::mask_vpexpandb<Arch>(
2183 source.to_native(), mask.to_bitset(), value.to_native()));
2184 }
2185 }
2186
2188 template<isa<x86> Arch>
2189 requires(Arch.has(x86_feature::avx512f) &&
2190 Arch.has(x86_feature::avx512bw) &&
2191 Arch.has(x86_feature::avx512vbmi2))
2192 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2193 constexpr simd<std::uint8_t, 64, Arch> maskz_vpexpandb(
2194 predicate<64, Arch> mask,
2195 simd<std::uint8_t, 64, Arch> value) noexcept {
2196 if consteval {
2197 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint8_t, 64, Arch>{}, mask.to_bitset(), value);
2198 } else {
2199 return simd<std::uint8_t, 64, Arch>::from_native(
2200 detail::x86_vbmi2::maskz_vpexpandb<Arch>(
2201 mask.to_bitset(), value.to_native()));
2202 }
2203 }
2204
2206 template<isa<x86> Arch, class T>
2207 requires(Arch.has(x86_feature::avx512f) &&
2208 Arch.has(x86_feature::avx512bw) &&
2209 Arch.has(x86_feature::avx512vbmi2) &&
2210 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>))
2211 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2")
2212 constexpr simd<std::uint8_t, 64, Arch> mask_vpexpandb(
2213 simd<std::uint8_t, 64, Arch> source,
2214 predicate<64, Arch> mask,
2215 T * memory) noexcept {
2216 if consteval {
2217 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
2218 } else {
2219 return simd<std::uint8_t, 64, Arch>::from_native(
2220 detail::x86_vbmi2::mask_vpexpandb<Arch>(
2221 source.to_native(), mask.to_bitset(), memory));
2222 }
2223 }
2224
2226 template<isa<x86> Arch, class T>
2227 requires(Arch.has(x86_feature::avx512f) &&
2228 Arch.has(x86_feature::avx512bw) &&
2229 Arch.has(x86_feature::avx512vbmi2) &&
2230 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>))
2231 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2")
2232 constexpr simd<std::uint8_t, 64, Arch> maskz_vpexpandb(
2233 predicate<64, Arch> mask,
2234 T * memory) noexcept {
2235 if consteval {
2236 return detail::x86_vbmi2_constant::expand_load(simd<std::uint8_t, 64, Arch>{}, mask.to_bitset(), memory);
2237 } else {
2238 return simd<std::uint8_t, 64, Arch>::from_native(
2239 detail::x86_vbmi2::maskz_vpexpandb_512<Arch>(
2240 static_cast<__mmask64>(mask.to_bitset()), memory));
2241 }
2242 }
2243
2245 template<isa<x86> Arch>
2246 requires(Arch.has(x86_feature::avx512f) &&
2247 Arch.has(x86_feature::avx512bw) &&
2248 Arch.has(x86_feature::avx512vbmi2))
2249 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2250 constexpr simd<std::uint16_t, 32, Arch> mask_vpcompressw(
2251 simd<std::uint16_t, 32, Arch> source,
2252 predicate<32, Arch> mask,
2253 simd<std::uint16_t, 32, Arch> value) noexcept {
2254 if consteval {
2255 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
2256 } else {
2257 return simd<std::uint16_t, 32, Arch>::from_native(
2258 detail::x86_vbmi2::mask_vpcompressw<Arch>(
2259 source.to_native(), mask.to_bitset(), value.to_native()));
2260 }
2261 }
2262
2264 template<isa<x86> Arch>
2265 requires(Arch.has(x86_feature::avx512f) &&
2266 Arch.has(x86_feature::avx512bw) &&
2267 Arch.has(x86_feature::avx512vbmi2))
2268 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2269 constexpr simd<std::uint16_t, 32, Arch> maskz_vpcompressw(
2270 predicate<32, Arch> mask,
2271 simd<std::uint16_t, 32, Arch> value) noexcept {
2272 if consteval {
2273 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint16_t, 32, Arch>{}, mask.to_bitset(), value);
2274 } else {
2275 return simd<std::uint16_t, 32, Arch>::from_native(
2276 detail::x86_vbmi2::maskz_vpcompressw<Arch>(
2277 mask.to_bitset(), value.to_native()));
2278 }
2279 }
2280
2282 template<isa<x86> Arch>
2283 requires(Arch.has(x86_feature::avx512f) &&
2284 Arch.has(x86_feature::avx512bw) &&
2285 Arch.has(x86_feature::avx512vbmi2))
2286 native_inline native_target("avx512f,avx512bw,avx512vbmi2")
2287 constexpr void mask_vpcompressw(
2288 std::uint16_t * destination,
2289 predicate<32, Arch> mask,
2290 simd<std::uint16_t, 32, Arch> value) noexcept {
2291 if consteval {
2292 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
2293 } else {
2294 detail::x86_vbmi2::mask_vpcompressw<Arch>(
2295 destination, mask.to_bitset(), value.to_native());
2296 }
2297 }
2298
2300 template<isa<x86> Arch>
2301 requires(Arch.has(x86_feature::avx512f) &&
2302 Arch.has(x86_feature::avx512bw) &&
2303 Arch.has(x86_feature::avx512vbmi2))
2304 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2305 constexpr simd<std::uint16_t, 32, Arch> mask_vpexpandw(
2306 simd<std::uint16_t, 32, Arch> source,
2307 predicate<32, Arch> mask,
2308 simd<std::uint16_t, 32, Arch> value) noexcept {
2309 if consteval {
2310 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
2311 } else {
2312 return simd<std::uint16_t, 32, Arch>::from_native(
2313 detail::x86_vbmi2::mask_vpexpandw<Arch>(
2314 source.to_native(), mask.to_bitset(), value.to_native()));
2315 }
2316 }
2317
2319 template<isa<x86> Arch>
2320 requires(Arch.has(x86_feature::avx512f) &&
2321 Arch.has(x86_feature::avx512bw) &&
2322 Arch.has(x86_feature::avx512vbmi2))
2323 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2324 constexpr simd<std::uint16_t, 32, Arch> maskz_vpexpandw(
2325 predicate<32, Arch> mask,
2326 simd<std::uint16_t, 32, Arch> value) noexcept {
2327 if consteval {
2328 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint16_t, 32, Arch>{}, mask.to_bitset(), value);
2329 } else {
2330 return simd<std::uint16_t, 32, Arch>::from_native(
2331 detail::x86_vbmi2::maskz_vpexpandw<Arch>(
2332 mask.to_bitset(), value.to_native()));
2333 }
2334 }
2335
2337 template<isa<x86> Arch, class T>
2338 requires(Arch.has(x86_feature::avx512f) &&
2339 Arch.has(x86_feature::avx512bw) &&
2340 Arch.has(x86_feature::avx512vbmi2) &&
2341 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>))
2342 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2")
2343 constexpr simd<std::uint16_t, 32, Arch> mask_vpexpandw(
2344 simd<std::uint16_t, 32, Arch> source,
2345 predicate<32, Arch> mask,
2346 T * memory) noexcept {
2347 if consteval {
2348 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
2349 } else {
2350 return simd<std::uint16_t, 32, Arch>::from_native(
2351 detail::x86_vbmi2::mask_vpexpandw<Arch>(
2352 source.to_native(), mask.to_bitset(), memory));
2353 }
2354 }
2355
2357 template<isa<x86> Arch, class T>
2358 requires(Arch.has(x86_feature::avx512f) &&
2359 Arch.has(x86_feature::avx512bw) &&
2360 Arch.has(x86_feature::avx512vbmi2) &&
2361 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>))
2362 native_nodiscard native_inline native_pure native_target("avx512f,avx512bw,avx512vbmi2")
2363 constexpr simd<std::uint16_t, 32, Arch> maskz_vpexpandw(
2364 predicate<32, Arch> mask,
2365 T * memory) noexcept {
2366 if consteval {
2367 return detail::x86_vbmi2_constant::expand_load(simd<std::uint16_t, 32, Arch>{}, mask.to_bitset(), memory);
2368 } else {
2369 return simd<std::uint16_t, 32, Arch>::from_native(
2370 detail::x86_vbmi2::maskz_vpexpandw_512<Arch>(
2371 static_cast<__mmask32>(mask.to_bitset()), memory));
2372 }
2373 }
2374
2376 template<isa<x86> Arch, unsigned Imm8>
2377 requires(Arch.has(x86_feature::avx512f) &&
2378 Arch.has(x86_feature::avx512bw) &&
2379 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2380 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2381 constexpr simd<std::uint16_t, 32, Arch> vpshldw(
2382 simd<std::uint16_t, 32, Arch> a,
2383 simd<std::uint16_t, 32, Arch> b) noexcept {
2384 if consteval {
2385 return detail::x86_vbmi2_constant::shift<false>(
2386 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
2387 } else {
2388 return simd<std::uint16_t, 32, Arch>::from_native(
2389 detail::x86_vbmi2::vpshldw<Arch, Imm8>(
2390 a.to_native(), b.to_native()));
2391 }
2392 }
2393
2395 template<isa<x86> Arch, unsigned Imm8>
2396 requires(Arch.has(x86_feature::avx512f) &&
2397 Arch.has(x86_feature::avx512bw) &&
2398 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2399 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2400 constexpr simd<std::uint16_t, 32, Arch> mask_vpshldw(
2401 simd<std::uint16_t, 32, Arch> source,
2402 predicate<32, Arch> mask,
2403 simd<std::uint16_t, 32, Arch> a,
2404 simd<std::uint16_t, 32, Arch> b) noexcept {
2405 if consteval {
2406 return detail::x86_vbmi2_constant::shift<false>(
2407 a, b, Imm8, source, mask.to_bitset());
2408 } else {
2409 return simd<std::uint16_t, 32, Arch>::from_native(
2410 detail::x86_vbmi2::mask_vpshldw<Arch, Imm8>(
2411 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
2412 }
2413 }
2414
2416 template<isa<x86> Arch, unsigned Imm8>
2417 requires(Arch.has(x86_feature::avx512f) &&
2418 Arch.has(x86_feature::avx512bw) &&
2419 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2420 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2421 constexpr simd<std::uint16_t, 32, Arch> maskz_vpshldw(
2422 predicate<32, Arch> mask,
2423 simd<std::uint16_t, 32, Arch> a,
2424 simd<std::uint16_t, 32, Arch> b) noexcept {
2425 if consteval {
2426 return detail::x86_vbmi2_constant::shift<false>(
2427 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
2428 } else {
2429 return simd<std::uint16_t, 32, Arch>::from_native(
2430 detail::x86_vbmi2::maskz_vpshldw<Arch, Imm8>(
2431 mask.to_bitset(), a.to_native(), b.to_native()));
2432 }
2433 }
2434
2436 template<isa<x86> Arch>
2437 requires(Arch.has(x86_feature::avx512f) &&
2438 Arch.has(x86_feature::avx512bw) &&
2439 Arch.has(x86_feature::avx512vbmi2))
2440 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2441 constexpr simd<std::uint16_t, 32, Arch> vpshldvw(
2442 simd<std::uint16_t, 32, Arch> a,
2443 simd<std::uint16_t, 32, Arch> b,
2444 simd<std::uint16_t, 32, Arch> counts) noexcept {
2445 if consteval {
2446 return detail::x86_vbmi2_constant::shift<false>(
2447 a, b, counts, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
2448 } else {
2449 return simd<std::uint16_t, 32, Arch>::from_native(
2450 detail::x86_vbmi2::vpshldvw<Arch>(
2451 a.to_native(), b.to_native(), counts.to_native()));
2452 }
2453 }
2454
2456 template<isa<x86> Arch>
2457 requires(Arch.has(x86_feature::avx512f) &&
2458 Arch.has(x86_feature::avx512bw) &&
2459 Arch.has(x86_feature::avx512vbmi2))
2460 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2461 constexpr simd<std::uint16_t, 32, Arch> mask_vpshldvw(
2462 simd<std::uint16_t, 32, Arch> a,
2463 predicate<32, Arch> mask,
2464 simd<std::uint16_t, 32, Arch> b,
2465 simd<std::uint16_t, 32, Arch> counts) noexcept {
2466 if consteval {
2467 return detail::x86_vbmi2_constant::shift<false>(
2468 a, b, counts, a, mask.to_bitset());
2469 } else {
2470 return simd<std::uint16_t, 32, Arch>::from_native(
2471 detail::x86_vbmi2::mask_vpshldvw<Arch>(
2472 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
2473 }
2474 }
2475
2477 template<isa<x86> Arch>
2478 requires(Arch.has(x86_feature::avx512f) &&
2479 Arch.has(x86_feature::avx512bw) &&
2480 Arch.has(x86_feature::avx512vbmi2))
2481 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2482 constexpr simd<std::uint16_t, 32, Arch> maskz_vpshldvw(
2483 predicate<32, Arch> mask,
2484 simd<std::uint16_t, 32, Arch> a,
2485 simd<std::uint16_t, 32, Arch> b,
2486 simd<std::uint16_t, 32, Arch> counts) noexcept {
2487 if consteval {
2488 return detail::x86_vbmi2_constant::shift<false>(
2489 a, b, counts, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
2490 } else {
2491 return simd<std::uint16_t, 32, Arch>::from_native(
2492 detail::x86_vbmi2::maskz_vpshldvw<Arch>(
2493 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
2494 }
2495 }
2496
2498 template<isa<x86> Arch, unsigned Imm8>
2499 requires(Arch.has(x86_feature::avx512f) &&
2500 Arch.has(x86_feature::avx512bw) &&
2501 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2502 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2503 constexpr simd<std::uint16_t, 32, Arch> vpshrdw(
2504 simd<std::uint16_t, 32, Arch> a,
2505 simd<std::uint16_t, 32, Arch> b) noexcept {
2506 if consteval {
2507 return detail::x86_vbmi2_constant::shift<true>(
2508 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
2509 } else {
2510 return simd<std::uint16_t, 32, Arch>::from_native(
2511 detail::x86_vbmi2::vpshrdw<Arch, Imm8>(
2512 a.to_native(), b.to_native()));
2513 }
2514 }
2515
2517 template<isa<x86> Arch, unsigned Imm8>
2518 requires(Arch.has(x86_feature::avx512f) &&
2519 Arch.has(x86_feature::avx512bw) &&
2520 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2521 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2522 constexpr simd<std::uint16_t, 32, Arch> mask_vpshrdw(
2523 simd<std::uint16_t, 32, Arch> source,
2524 predicate<32, Arch> mask,
2525 simd<std::uint16_t, 32, Arch> a,
2526 simd<std::uint16_t, 32, Arch> b) noexcept {
2527 if consteval {
2528 return detail::x86_vbmi2_constant::shift<true>(
2529 a, b, Imm8, source, mask.to_bitset());
2530 } else {
2531 return simd<std::uint16_t, 32, Arch>::from_native(
2532 detail::x86_vbmi2::mask_vpshrdw<Arch, Imm8>(
2533 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
2534 }
2535 }
2536
2538 template<isa<x86> Arch, unsigned Imm8>
2539 requires(Arch.has(x86_feature::avx512f) &&
2540 Arch.has(x86_feature::avx512bw) &&
2541 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2542 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2543 constexpr simd<std::uint16_t, 32, Arch> maskz_vpshrdw(
2544 predicate<32, Arch> mask,
2545 simd<std::uint16_t, 32, Arch> a,
2546 simd<std::uint16_t, 32, Arch> b) noexcept {
2547 if consteval {
2548 return detail::x86_vbmi2_constant::shift<true>(
2549 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
2550 } else {
2551 return simd<std::uint16_t, 32, Arch>::from_native(
2552 detail::x86_vbmi2::maskz_vpshrdw<Arch, Imm8>(
2553 mask.to_bitset(), a.to_native(), b.to_native()));
2554 }
2555 }
2556
2558 template<isa<x86> Arch>
2559 requires(Arch.has(x86_feature::avx512f) &&
2560 Arch.has(x86_feature::avx512bw) &&
2561 Arch.has(x86_feature::avx512vbmi2))
2562 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2563 constexpr simd<std::uint16_t, 32, Arch> vpshrdvw(
2564 simd<std::uint16_t, 32, Arch> a,
2565 simd<std::uint16_t, 32, Arch> b,
2566 simd<std::uint16_t, 32, Arch> counts) noexcept {
2567 if consteval {
2568 return detail::x86_vbmi2_constant::shift<true>(
2569 a, b, counts, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
2570 } else {
2571 return simd<std::uint16_t, 32, Arch>::from_native(
2572 detail::x86_vbmi2::vpshrdvw<Arch>(
2573 a.to_native(), b.to_native(), counts.to_native()));
2574 }
2575 }
2576
2578 template<isa<x86> Arch>
2579 requires(Arch.has(x86_feature::avx512f) &&
2580 Arch.has(x86_feature::avx512bw) &&
2581 Arch.has(x86_feature::avx512vbmi2))
2582 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2583 constexpr simd<std::uint16_t, 32, Arch> mask_vpshrdvw(
2584 simd<std::uint16_t, 32, Arch> a,
2585 predicate<32, Arch> mask,
2586 simd<std::uint16_t, 32, Arch> b,
2587 simd<std::uint16_t, 32, Arch> counts) noexcept {
2588 if consteval {
2589 return detail::x86_vbmi2_constant::shift<true>(
2590 a, b, counts, a, mask.to_bitset());
2591 } else {
2592 return simd<std::uint16_t, 32, Arch>::from_native(
2593 detail::x86_vbmi2::mask_vpshrdvw<Arch>(
2594 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
2595 }
2596 }
2597
2599 template<isa<x86> Arch>
2600 requires(Arch.has(x86_feature::avx512f) &&
2601 Arch.has(x86_feature::avx512bw) &&
2602 Arch.has(x86_feature::avx512vbmi2))
2603 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2604 constexpr simd<std::uint16_t, 32, Arch> maskz_vpshrdvw(
2605 predicate<32, Arch> mask,
2606 simd<std::uint16_t, 32, Arch> a,
2607 simd<std::uint16_t, 32, Arch> b,
2608 simd<std::uint16_t, 32, Arch> counts) noexcept {
2609 if consteval {
2610 return detail::x86_vbmi2_constant::shift<true>(
2611 a, b, counts, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
2612 } else {
2613 return simd<std::uint16_t, 32, Arch>::from_native(
2614 detail::x86_vbmi2::maskz_vpshrdvw<Arch>(
2615 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
2616 }
2617 }
2618
2620 template<isa<x86> Arch, unsigned Imm8>
2621 requires(Arch.has(x86_feature::avx512f) &&
2622 Arch.has(x86_feature::avx512bw) &&
2623 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2624 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2625 constexpr simd<std::uint32_t, 16, Arch> vpshldd(
2626 simd<std::uint32_t, 16, Arch> a,
2627 simd<std::uint32_t, 16, Arch> b) noexcept {
2628 if consteval {
2629 return detail::x86_vbmi2_constant::shift<false>(
2630 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
2631 } else {
2632 return simd<std::uint32_t, 16, Arch>::from_native(
2633 detail::x86_vbmi2::vpshldd<Arch, Imm8>(
2634 a.to_native(), b.to_native()));
2635 }
2636 }
2637
2639 template<isa<x86> Arch, unsigned Imm8>
2640 requires(Arch.has(x86_feature::avx512f) &&
2641 Arch.has(x86_feature::avx512bw) &&
2642 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2643 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2644 constexpr simd<std::uint32_t, 16, Arch> mask_vpshldd(
2645 simd<std::uint32_t, 16, Arch> source,
2646 predicate<16, Arch> mask,
2647 simd<std::uint32_t, 16, Arch> a,
2648 simd<std::uint32_t, 16, Arch> b) noexcept {
2649 if consteval {
2650 return detail::x86_vbmi2_constant::shift<false>(
2651 a, b, Imm8, source, mask.to_bitset());
2652 } else {
2653 return simd<std::uint32_t, 16, Arch>::from_native(
2654 detail::x86_vbmi2::mask_vpshldd<Arch, Imm8>(
2655 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
2656 }
2657 }
2658
2660 template<isa<x86> Arch, unsigned Imm8>
2661 requires(Arch.has(x86_feature::avx512f) &&
2662 Arch.has(x86_feature::avx512bw) &&
2663 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2664 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2665 constexpr simd<std::uint32_t, 16, Arch> maskz_vpshldd(
2666 predicate<16, Arch> mask,
2667 simd<std::uint32_t, 16, Arch> a,
2668 simd<std::uint32_t, 16, Arch> b) noexcept {
2669 if consteval {
2670 return detail::x86_vbmi2_constant::shift<false>(
2671 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
2672 } else {
2673 return simd<std::uint32_t, 16, Arch>::from_native(
2674 detail::x86_vbmi2::maskz_vpshldd<Arch, Imm8>(
2675 mask.to_bitset(), a.to_native(), b.to_native()));
2676 }
2677 }
2678
2680 template<isa<x86> Arch>
2681 requires(Arch.has(x86_feature::avx512f) &&
2682 Arch.has(x86_feature::avx512bw) &&
2683 Arch.has(x86_feature::avx512vbmi2))
2684 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2685 constexpr simd<std::uint32_t, 16, Arch> vpshldvd(
2686 simd<std::uint32_t, 16, Arch> a,
2687 simd<std::uint32_t, 16, Arch> b,
2688 simd<std::uint32_t, 16, Arch> counts) noexcept {
2689 if consteval {
2690 return detail::x86_vbmi2_constant::shift<false>(
2691 a, b, counts, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
2692 } else {
2693 return simd<std::uint32_t, 16, Arch>::from_native(
2694 detail::x86_vbmi2::vpshldvd<Arch>(
2695 a.to_native(), b.to_native(), counts.to_native()));
2696 }
2697 }
2698
2700 template<isa<x86> Arch>
2701 requires(Arch.has(x86_feature::avx512f) &&
2702 Arch.has(x86_feature::avx512bw) &&
2703 Arch.has(x86_feature::avx512vbmi2))
2704 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2705 constexpr simd<std::uint32_t, 16, Arch> mask_vpshldvd(
2706 simd<std::uint32_t, 16, Arch> a,
2707 predicate<16, Arch> mask,
2708 simd<std::uint32_t, 16, Arch> b,
2709 simd<std::uint32_t, 16, Arch> counts) noexcept {
2710 if consteval {
2711 return detail::x86_vbmi2_constant::shift<false>(
2712 a, b, counts, a, mask.to_bitset());
2713 } else {
2714 return simd<std::uint32_t, 16, Arch>::from_native(
2715 detail::x86_vbmi2::mask_vpshldvd<Arch>(
2716 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
2717 }
2718 }
2719
2721 template<isa<x86> Arch>
2722 requires(Arch.has(x86_feature::avx512f) &&
2723 Arch.has(x86_feature::avx512bw) &&
2724 Arch.has(x86_feature::avx512vbmi2))
2725 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2726 constexpr simd<std::uint32_t, 16, Arch> maskz_vpshldvd(
2727 predicate<16, Arch> mask,
2728 simd<std::uint32_t, 16, Arch> a,
2729 simd<std::uint32_t, 16, Arch> b,
2730 simd<std::uint32_t, 16, Arch> counts) noexcept {
2731 if consteval {
2732 return detail::x86_vbmi2_constant::shift<false>(
2733 a, b, counts, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
2734 } else {
2735 return simd<std::uint32_t, 16, Arch>::from_native(
2736 detail::x86_vbmi2::maskz_vpshldvd<Arch>(
2737 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
2738 }
2739 }
2740
2742 template<isa<x86> Arch, unsigned Imm8>
2743 requires(Arch.has(x86_feature::avx512f) &&
2744 Arch.has(x86_feature::avx512bw) &&
2745 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2746 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2747 constexpr simd<std::uint32_t, 16, Arch> vpshrdd(
2748 simd<std::uint32_t, 16, Arch> a,
2749 simd<std::uint32_t, 16, Arch> b) noexcept {
2750 if consteval {
2751 return detail::x86_vbmi2_constant::shift<true>(
2752 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
2753 } else {
2754 return simd<std::uint32_t, 16, Arch>::from_native(
2755 detail::x86_vbmi2::vpshrdd<Arch, Imm8>(
2756 a.to_native(), b.to_native()));
2757 }
2758 }
2759
2761 template<isa<x86> Arch, unsigned Imm8>
2762 requires(Arch.has(x86_feature::avx512f) &&
2763 Arch.has(x86_feature::avx512bw) &&
2764 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2765 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2766 constexpr simd<std::uint32_t, 16, Arch> mask_vpshrdd(
2767 simd<std::uint32_t, 16, Arch> source,
2768 predicate<16, Arch> mask,
2769 simd<std::uint32_t, 16, Arch> a,
2770 simd<std::uint32_t, 16, Arch> b) noexcept {
2771 if consteval {
2772 return detail::x86_vbmi2_constant::shift<true>(
2773 a, b, Imm8, source, mask.to_bitset());
2774 } else {
2775 return simd<std::uint32_t, 16, Arch>::from_native(
2776 detail::x86_vbmi2::mask_vpshrdd<Arch, Imm8>(
2777 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
2778 }
2779 }
2780
2782 template<isa<x86> Arch, unsigned Imm8>
2783 requires(Arch.has(x86_feature::avx512f) &&
2784 Arch.has(x86_feature::avx512bw) &&
2785 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2786 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2787 constexpr simd<std::uint32_t, 16, Arch> maskz_vpshrdd(
2788 predicate<16, Arch> mask,
2789 simd<std::uint32_t, 16, Arch> a,
2790 simd<std::uint32_t, 16, Arch> b) noexcept {
2791 if consteval {
2792 return detail::x86_vbmi2_constant::shift<true>(
2793 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
2794 } else {
2795 return simd<std::uint32_t, 16, Arch>::from_native(
2796 detail::x86_vbmi2::maskz_vpshrdd<Arch, Imm8>(
2797 mask.to_bitset(), a.to_native(), b.to_native()));
2798 }
2799 }
2800
2802 template<isa<x86> Arch>
2803 requires(Arch.has(x86_feature::avx512f) &&
2804 Arch.has(x86_feature::avx512bw) &&
2805 Arch.has(x86_feature::avx512vbmi2))
2806 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2807 constexpr simd<std::uint32_t, 16, Arch> vpshrdvd(
2808 simd<std::uint32_t, 16, Arch> a,
2809 simd<std::uint32_t, 16, Arch> b,
2810 simd<std::uint32_t, 16, Arch> counts) noexcept {
2811 if consteval {
2812 return detail::x86_vbmi2_constant::shift<true>(
2813 a, b, counts, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
2814 } else {
2815 return simd<std::uint32_t, 16, Arch>::from_native(
2816 detail::x86_vbmi2::vpshrdvd<Arch>(
2817 a.to_native(), b.to_native(), counts.to_native()));
2818 }
2819 }
2820
2822 template<isa<x86> Arch>
2823 requires(Arch.has(x86_feature::avx512f) &&
2824 Arch.has(x86_feature::avx512bw) &&
2825 Arch.has(x86_feature::avx512vbmi2))
2826 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2827 constexpr simd<std::uint32_t, 16, Arch> mask_vpshrdvd(
2828 simd<std::uint32_t, 16, Arch> a,
2829 predicate<16, Arch> mask,
2830 simd<std::uint32_t, 16, Arch> b,
2831 simd<std::uint32_t, 16, Arch> counts) noexcept {
2832 if consteval {
2833 return detail::x86_vbmi2_constant::shift<true>(
2834 a, b, counts, a, mask.to_bitset());
2835 } else {
2836 return simd<std::uint32_t, 16, Arch>::from_native(
2837 detail::x86_vbmi2::mask_vpshrdvd<Arch>(
2838 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
2839 }
2840 }
2841
2843 template<isa<x86> Arch>
2844 requires(Arch.has(x86_feature::avx512f) &&
2845 Arch.has(x86_feature::avx512bw) &&
2846 Arch.has(x86_feature::avx512vbmi2))
2847 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2848 constexpr simd<std::uint32_t, 16, Arch> maskz_vpshrdvd(
2849 predicate<16, Arch> mask,
2850 simd<std::uint32_t, 16, Arch> a,
2851 simd<std::uint32_t, 16, Arch> b,
2852 simd<std::uint32_t, 16, Arch> counts) noexcept {
2853 if consteval {
2854 return detail::x86_vbmi2_constant::shift<true>(
2855 a, b, counts, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
2856 } else {
2857 return simd<std::uint32_t, 16, Arch>::from_native(
2858 detail::x86_vbmi2::maskz_vpshrdvd<Arch>(
2859 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
2860 }
2861 }
2862
2864 template<isa<x86> Arch, unsigned Imm8>
2865 requires(Arch.has(x86_feature::avx512f) &&
2866 Arch.has(x86_feature::avx512bw) &&
2867 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2868 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2869 constexpr simd<std::uint64_t, 8, Arch> vpshldq(
2870 simd<std::uint64_t, 8, Arch> a,
2871 simd<std::uint64_t, 8, Arch> b) noexcept {
2872 if consteval {
2873 return detail::x86_vbmi2_constant::shift<false>(
2874 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
2875 } else {
2876 return simd<std::uint64_t, 8, Arch>::from_native(
2877 detail::x86_vbmi2::vpshldq<Arch, Imm8>(
2878 a.to_native(), b.to_native()));
2879 }
2880 }
2881
2883 template<isa<x86> Arch, unsigned Imm8>
2884 requires(Arch.has(x86_feature::avx512f) &&
2885 Arch.has(x86_feature::avx512bw) &&
2886 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2887 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2888 constexpr simd<std::uint64_t, 8, Arch> mask_vpshldq(
2889 simd<std::uint64_t, 8, Arch> source,
2890 predicate<8, Arch> mask,
2891 simd<std::uint64_t, 8, Arch> a,
2892 simd<std::uint64_t, 8, Arch> b) noexcept {
2893 if consteval {
2894 return detail::x86_vbmi2_constant::shift<false>(
2895 a, b, Imm8, source, mask.to_bitset());
2896 } else {
2897 return simd<std::uint64_t, 8, Arch>::from_native(
2898 detail::x86_vbmi2::mask_vpshldq<Arch, Imm8>(
2899 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
2900 }
2901 }
2902
2904 template<isa<x86> Arch, unsigned Imm8>
2905 requires(Arch.has(x86_feature::avx512f) &&
2906 Arch.has(x86_feature::avx512bw) &&
2907 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2908 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2909 constexpr simd<std::uint64_t, 8, Arch> maskz_vpshldq(
2910 predicate<8, Arch> mask,
2911 simd<std::uint64_t, 8, Arch> a,
2912 simd<std::uint64_t, 8, Arch> b) noexcept {
2913 if consteval {
2914 return detail::x86_vbmi2_constant::shift<false>(
2915 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
2916 } else {
2917 return simd<std::uint64_t, 8, Arch>::from_native(
2918 detail::x86_vbmi2::maskz_vpshldq<Arch, Imm8>(
2919 mask.to_bitset(), a.to_native(), b.to_native()));
2920 }
2921 }
2922
2924 template<isa<x86> Arch>
2925 requires(Arch.has(x86_feature::avx512f) &&
2926 Arch.has(x86_feature::avx512bw) &&
2927 Arch.has(x86_feature::avx512vbmi2))
2928 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2929 constexpr simd<std::uint64_t, 8, Arch> vpshldvq(
2930 simd<std::uint64_t, 8, Arch> a,
2931 simd<std::uint64_t, 8, Arch> b,
2932 simd<std::uint64_t, 8, Arch> counts) noexcept {
2933 if consteval {
2934 return detail::x86_vbmi2_constant::shift<false>(
2935 a, b, counts, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
2936 } else {
2937 return simd<std::uint64_t, 8, Arch>::from_native(
2938 detail::x86_vbmi2::vpshldvq<Arch>(
2939 a.to_native(), b.to_native(), counts.to_native()));
2940 }
2941 }
2942
2944 template<isa<x86> Arch>
2945 requires(Arch.has(x86_feature::avx512f) &&
2946 Arch.has(x86_feature::avx512bw) &&
2947 Arch.has(x86_feature::avx512vbmi2))
2948 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2949 constexpr simd<std::uint64_t, 8, Arch> mask_vpshldvq(
2950 simd<std::uint64_t, 8, Arch> a,
2951 predicate<8, Arch> mask,
2952 simd<std::uint64_t, 8, Arch> b,
2953 simd<std::uint64_t, 8, Arch> counts) noexcept {
2954 if consteval {
2955 return detail::x86_vbmi2_constant::shift<false>(
2956 a, b, counts, a, mask.to_bitset());
2957 } else {
2958 return simd<std::uint64_t, 8, Arch>::from_native(
2959 detail::x86_vbmi2::mask_vpshldvq<Arch>(
2960 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
2961 }
2962 }
2963
2965 template<isa<x86> Arch>
2966 requires(Arch.has(x86_feature::avx512f) &&
2967 Arch.has(x86_feature::avx512bw) &&
2968 Arch.has(x86_feature::avx512vbmi2))
2969 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2970 constexpr simd<std::uint64_t, 8, Arch> maskz_vpshldvq(
2971 predicate<8, Arch> mask,
2972 simd<std::uint64_t, 8, Arch> a,
2973 simd<std::uint64_t, 8, Arch> b,
2974 simd<std::uint64_t, 8, Arch> counts) noexcept {
2975 if consteval {
2976 return detail::x86_vbmi2_constant::shift<false>(
2977 a, b, counts, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
2978 } else {
2979 return simd<std::uint64_t, 8, Arch>::from_native(
2980 detail::x86_vbmi2::maskz_vpshldvq<Arch>(
2981 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
2982 }
2983 }
2984
2986 template<isa<x86> Arch, unsigned Imm8>
2987 requires(Arch.has(x86_feature::avx512f) &&
2988 Arch.has(x86_feature::avx512bw) &&
2989 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
2990 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
2991 constexpr simd<std::uint64_t, 8, Arch> vpshrdq(
2992 simd<std::uint64_t, 8, Arch> a,
2993 simd<std::uint64_t, 8, Arch> b) noexcept {
2994 if consteval {
2995 return detail::x86_vbmi2_constant::shift<true>(
2996 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
2997 } else {
2998 return simd<std::uint64_t, 8, Arch>::from_native(
2999 detail::x86_vbmi2::vpshrdq<Arch, Imm8>(
3000 a.to_native(), b.to_native()));
3001 }
3002 }
3003
3005 template<isa<x86> Arch, unsigned Imm8>
3006 requires(Arch.has(x86_feature::avx512f) &&
3007 Arch.has(x86_feature::avx512bw) &&
3008 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
3009 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
3010 constexpr simd<std::uint64_t, 8, Arch> mask_vpshrdq(
3011 simd<std::uint64_t, 8, Arch> source,
3012 predicate<8, Arch> mask,
3013 simd<std::uint64_t, 8, Arch> a,
3014 simd<std::uint64_t, 8, Arch> b) noexcept {
3015 if consteval {
3016 return detail::x86_vbmi2_constant::shift<true>(
3017 a, b, Imm8, source, mask.to_bitset());
3018 } else {
3019 return simd<std::uint64_t, 8, Arch>::from_native(
3020 detail::x86_vbmi2::mask_vpshrdq<Arch, Imm8>(
3021 source.to_native(), mask.to_bitset(), a.to_native(), b.to_native()));
3022 }
3023 }
3024
3026 template<isa<x86> Arch, unsigned Imm8>
3027 requires(Arch.has(x86_feature::avx512f) &&
3028 Arch.has(x86_feature::avx512bw) &&
3029 Arch.has(x86_feature::avx512vbmi2) && Imm8 <= 255)
3030 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
3031 constexpr simd<std::uint64_t, 8, Arch> maskz_vpshrdq(
3032 predicate<8, Arch> mask,
3033 simd<std::uint64_t, 8, Arch> a,
3034 simd<std::uint64_t, 8, Arch> b) noexcept {
3035 if consteval {
3036 return detail::x86_vbmi2_constant::shift<true>(
3037 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
3038 } else {
3039 return simd<std::uint64_t, 8, Arch>::from_native(
3040 detail::x86_vbmi2::maskz_vpshrdq<Arch, Imm8>(
3041 mask.to_bitset(), a.to_native(), b.to_native()));
3042 }
3043 }
3044
3046 template<isa<x86> Arch>
3047 requires(Arch.has(x86_feature::avx512f) &&
3048 Arch.has(x86_feature::avx512bw) &&
3049 Arch.has(x86_feature::avx512vbmi2))
3050 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
3051 constexpr simd<std::uint64_t, 8, Arch> vpshrdvq(
3052 simd<std::uint64_t, 8, Arch> a,
3053 simd<std::uint64_t, 8, Arch> b,
3054 simd<std::uint64_t, 8, Arch> counts) noexcept {
3055 if consteval {
3056 return detail::x86_vbmi2_constant::shift<true>(
3057 a, b, counts, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
3058 } else {
3059 return simd<std::uint64_t, 8, Arch>::from_native(
3060 detail::x86_vbmi2::vpshrdvq<Arch>(
3061 a.to_native(), b.to_native(), counts.to_native()));
3062 }
3063 }
3064
3066 template<isa<x86> Arch>
3067 requires(Arch.has(x86_feature::avx512f) &&
3068 Arch.has(x86_feature::avx512bw) &&
3069 Arch.has(x86_feature::avx512vbmi2))
3070 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
3071 constexpr simd<std::uint64_t, 8, Arch> mask_vpshrdvq(
3072 simd<std::uint64_t, 8, Arch> a,
3073 predicate<8, Arch> mask,
3074 simd<std::uint64_t, 8, Arch> b,
3075 simd<std::uint64_t, 8, Arch> counts) noexcept {
3076 if consteval {
3077 return detail::x86_vbmi2_constant::shift<true>(
3078 a, b, counts, a, mask.to_bitset());
3079 } else {
3080 return simd<std::uint64_t, 8, Arch>::from_native(
3081 detail::x86_vbmi2::mask_vpshrdvq<Arch>(
3082 a.to_native(), mask.to_bitset(), b.to_native(), counts.to_native()));
3083 }
3084 }
3085
3087 template<isa<x86> Arch>
3088 requires(Arch.has(x86_feature::avx512f) &&
3089 Arch.has(x86_feature::avx512bw) &&
3090 Arch.has(x86_feature::avx512vbmi2))
3091 native_nodiscard native_inline native_const native_target("avx512f,avx512bw,avx512vbmi2")
3092 constexpr simd<std::uint64_t, 8, Arch> maskz_vpshrdvq(
3093 predicate<8, Arch> mask,
3094 simd<std::uint64_t, 8, Arch> a,
3095 simd<std::uint64_t, 8, Arch> b,
3096 simd<std::uint64_t, 8, Arch> counts) noexcept {
3097 if consteval {
3098 return detail::x86_vbmi2_constant::shift<true>(
3099 a, b, counts, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
3100 } else {
3101 return simd<std::uint64_t, 8, Arch>::from_native(
3102 detail::x86_vbmi2::maskz_vpshrdvq<Arch>(
3103 mask.to_bitset(), a.to_native(), b.to_native(), counts.to_native()));
3104 }
3105 }
3106
3108 template<isa<x86> Arch>
3109 requires(!(Arch.has(x86_feature::avx512f) &&
3110 Arch.has(x86_feature::avx512bw) &&
3111 Arch.has(x86_feature::avx512vbmi2) &&
3112 Arch.has(x86_feature::avx512vl)) &&
3113 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3114 native_nodiscard consteval simd<std::uint8_t, 16, Arch> mask_vpcompressb(
3115 simd<std::uint8_t, 16, Arch> source,
3116 predicate<16, Arch> mask,
3117 simd<std::uint8_t, 16, Arch> value) noexcept {
3118 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
3119 }
3120
3122 template<isa<x86> Arch>
3123 requires(!(Arch.has(x86_feature::avx512f) &&
3124 Arch.has(x86_feature::avx512bw) &&
3125 Arch.has(x86_feature::avx512vbmi2) &&
3126 Arch.has(x86_feature::avx512vl)) &&
3127 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3128 native_nodiscard consteval simd<std::uint8_t, 16, Arch> maskz_vpcompressb(
3129 predicate<16, Arch> mask,
3130 simd<std::uint8_t, 16, Arch> value) noexcept {
3131 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint8_t, 16, Arch>{}, mask.to_bitset(), value);
3132 }
3133
3135 template<isa<x86> Arch>
3136 requires(!(Arch.has(x86_feature::avx512f) &&
3137 Arch.has(x86_feature::avx512bw) &&
3138 Arch.has(x86_feature::avx512vbmi2) &&
3139 Arch.has(x86_feature::avx512vl)) &&
3140 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3141 consteval void mask_vpcompressb(
3142 std::uint8_t * destination,
3143 predicate<16, Arch> mask,
3144 simd<std::uint8_t, 16, Arch> value) noexcept {
3145 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
3146 }
3147
3149 template<isa<x86> Arch>
3150 requires(!(Arch.has(x86_feature::avx512f) &&
3151 Arch.has(x86_feature::avx512bw) &&
3152 Arch.has(x86_feature::avx512vbmi2) &&
3153 Arch.has(x86_feature::avx512vl)) &&
3154 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3155 native_nodiscard consteval simd<std::uint8_t, 16, Arch> mask_vpexpandb(
3156 simd<std::uint8_t, 16, Arch> source,
3157 predicate<16, Arch> mask,
3158 simd<std::uint8_t, 16, Arch> value) noexcept {
3159 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
3160 }
3161
3163 template<isa<x86> Arch>
3164 requires(!(Arch.has(x86_feature::avx512f) &&
3165 Arch.has(x86_feature::avx512bw) &&
3166 Arch.has(x86_feature::avx512vbmi2) &&
3167 Arch.has(x86_feature::avx512vl)) &&
3168 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3169 native_nodiscard consteval simd<std::uint8_t, 16, Arch> maskz_vpexpandb(
3170 predicate<16, Arch> mask,
3171 simd<std::uint8_t, 16, Arch> value) noexcept {
3172 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint8_t, 16, Arch>{}, mask.to_bitset(), value);
3173 }
3174
3176 template<isa<x86> Arch, class T>
3177 requires(!(Arch.has(x86_feature::avx512f) &&
3178 Arch.has(x86_feature::avx512bw) &&
3179 Arch.has(x86_feature::avx512vbmi2) &&
3180 Arch.has(x86_feature::avx512vl)) &&
3181 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>) &&
3182 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3183 native_nodiscard consteval simd<std::uint8_t, 16, Arch> mask_vpexpandb(
3184 simd<std::uint8_t, 16, Arch> source,
3185 predicate<16, Arch> mask,
3186 T * memory) noexcept {
3187 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
3188 }
3189
3191 template<isa<x86> Arch, class T>
3192 requires(!(Arch.has(x86_feature::avx512f) &&
3193 Arch.has(x86_feature::avx512bw) &&
3194 Arch.has(x86_feature::avx512vbmi2) &&
3195 Arch.has(x86_feature::avx512vl)) &&
3196 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>) &&
3197 requires { sizeof(simd<std::uint8_t, 16, Arch>); })
3198 native_nodiscard consteval simd<std::uint8_t, 16, Arch> maskz_vpexpandb(
3199 predicate<16, Arch> mask,
3200 T * memory) noexcept {
3201 return detail::x86_vbmi2_constant::expand_load(simd<std::uint8_t, 16, Arch>{}, mask.to_bitset(), memory);
3202 }
3203
3205 template<isa<x86> Arch>
3206 requires(!(Arch.has(x86_feature::avx512f) &&
3207 Arch.has(x86_feature::avx512bw) &&
3208 Arch.has(x86_feature::avx512vbmi2) &&
3209 Arch.has(x86_feature::avx512vl)) &&
3210 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3211 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpcompressw(
3212 simd<std::uint16_t, 8, Arch> source,
3213 predicate<8, Arch> mask,
3214 simd<std::uint16_t, 8, Arch> value) noexcept {
3215 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
3216 }
3217
3219 template<isa<x86> Arch>
3220 requires(!(Arch.has(x86_feature::avx512f) &&
3221 Arch.has(x86_feature::avx512bw) &&
3222 Arch.has(x86_feature::avx512vbmi2) &&
3223 Arch.has(x86_feature::avx512vl)) &&
3224 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3225 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpcompressw(
3226 predicate<8, Arch> mask,
3227 simd<std::uint16_t, 8, Arch> value) noexcept {
3228 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint16_t, 8, Arch>{}, mask.to_bitset(), value);
3229 }
3230
3232 template<isa<x86> Arch>
3233 requires(!(Arch.has(x86_feature::avx512f) &&
3234 Arch.has(x86_feature::avx512bw) &&
3235 Arch.has(x86_feature::avx512vbmi2) &&
3236 Arch.has(x86_feature::avx512vl)) &&
3237 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3238 consteval void mask_vpcompressw(
3239 std::uint16_t * destination,
3240 predicate<8, Arch> mask,
3241 simd<std::uint16_t, 8, Arch> value) noexcept {
3242 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
3243 }
3244
3246 template<isa<x86> Arch>
3247 requires(!(Arch.has(x86_feature::avx512f) &&
3248 Arch.has(x86_feature::avx512bw) &&
3249 Arch.has(x86_feature::avx512vbmi2) &&
3250 Arch.has(x86_feature::avx512vl)) &&
3251 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3252 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpexpandw(
3253 simd<std::uint16_t, 8, Arch> source,
3254 predicate<8, Arch> mask,
3255 simd<std::uint16_t, 8, Arch> value) noexcept {
3256 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
3257 }
3258
3260 template<isa<x86> Arch>
3261 requires(!(Arch.has(x86_feature::avx512f) &&
3262 Arch.has(x86_feature::avx512bw) &&
3263 Arch.has(x86_feature::avx512vbmi2) &&
3264 Arch.has(x86_feature::avx512vl)) &&
3265 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3266 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpexpandw(
3267 predicate<8, Arch> mask,
3268 simd<std::uint16_t, 8, Arch> value) noexcept {
3269 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint16_t, 8, Arch>{}, mask.to_bitset(), value);
3270 }
3271
3273 template<isa<x86> Arch, class T>
3274 requires(!(Arch.has(x86_feature::avx512f) &&
3275 Arch.has(x86_feature::avx512bw) &&
3276 Arch.has(x86_feature::avx512vbmi2) &&
3277 Arch.has(x86_feature::avx512vl)) &&
3278 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>) &&
3279 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3280 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpexpandw(
3281 simd<std::uint16_t, 8, Arch> source,
3282 predicate<8, Arch> mask,
3283 T * memory) noexcept {
3284 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
3285 }
3286
3288 template<isa<x86> Arch, class T>
3289 requires(!(Arch.has(x86_feature::avx512f) &&
3290 Arch.has(x86_feature::avx512bw) &&
3291 Arch.has(x86_feature::avx512vbmi2) &&
3292 Arch.has(x86_feature::avx512vl)) &&
3293 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>) &&
3294 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3295 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpexpandw(
3296 predicate<8, Arch> mask,
3297 T * memory) noexcept {
3298 return detail::x86_vbmi2_constant::expand_load(simd<std::uint16_t, 8, Arch>{}, mask.to_bitset(), memory);
3299 }
3300
3302 template<isa<x86> Arch, unsigned Imm8>
3303 requires(!(Arch.has(x86_feature::avx512f) &&
3304 Arch.has(x86_feature::avx512bw) &&
3305 Arch.has(x86_feature::avx512vbmi2) &&
3306 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3307 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3308 native_nodiscard consteval simd<std::uint16_t, 8, Arch> vpshldw(
3309 simd<std::uint16_t, 8, Arch> a,
3310 simd<std::uint16_t, 8, Arch> b) noexcept {
3311 return detail::x86_vbmi2_constant::shift<false>(
3312 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
3313 }
3314
3316 template<isa<x86> Arch, unsigned Imm8>
3317 requires(!(Arch.has(x86_feature::avx512f) &&
3318 Arch.has(x86_feature::avx512bw) &&
3319 Arch.has(x86_feature::avx512vbmi2) &&
3320 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3321 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3322 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpshldw(
3323 simd<std::uint16_t, 8, Arch> source,
3324 predicate<8, Arch> mask,
3325 simd<std::uint16_t, 8, Arch> a,
3326 simd<std::uint16_t, 8, Arch> b) noexcept {
3327 return detail::x86_vbmi2_constant::shift<false>(
3328 a, b, Imm8, source, mask.to_bitset());
3329 }
3330
3332 template<isa<x86> Arch, unsigned Imm8>
3333 requires(!(Arch.has(x86_feature::avx512f) &&
3334 Arch.has(x86_feature::avx512bw) &&
3335 Arch.has(x86_feature::avx512vbmi2) &&
3336 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3337 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3338 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpshldw(
3339 predicate<8, Arch> mask,
3340 simd<std::uint16_t, 8, Arch> a,
3341 simd<std::uint16_t, 8, Arch> b) noexcept {
3342 return detail::x86_vbmi2_constant::shift<false>(
3343 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
3344 }
3345
3347 template<isa<x86> Arch>
3348 requires(!(Arch.has(x86_feature::avx512f) &&
3349 Arch.has(x86_feature::avx512bw) &&
3350 Arch.has(x86_feature::avx512vbmi2) &&
3351 Arch.has(x86_feature::avx512vl)) &&
3352 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3353 native_nodiscard consteval simd<std::uint16_t, 8, Arch> vpshldvw(
3354 simd<std::uint16_t, 8, Arch> a,
3355 simd<std::uint16_t, 8, Arch> b,
3356 simd<std::uint16_t, 8, Arch> counts) noexcept {
3357 return detail::x86_vbmi2_constant::shift<false>(
3358 a, b, counts, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
3359 }
3360
3362 template<isa<x86> Arch>
3363 requires(!(Arch.has(x86_feature::avx512f) &&
3364 Arch.has(x86_feature::avx512bw) &&
3365 Arch.has(x86_feature::avx512vbmi2) &&
3366 Arch.has(x86_feature::avx512vl)) &&
3367 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3368 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpshldvw(
3369 simd<std::uint16_t, 8, Arch> a,
3370 predicate<8, Arch> mask,
3371 simd<std::uint16_t, 8, Arch> b,
3372 simd<std::uint16_t, 8, Arch> counts) noexcept {
3373 return detail::x86_vbmi2_constant::shift<false>(
3374 a, b, counts, a, mask.to_bitset());
3375 }
3376
3378 template<isa<x86> Arch>
3379 requires(!(Arch.has(x86_feature::avx512f) &&
3380 Arch.has(x86_feature::avx512bw) &&
3381 Arch.has(x86_feature::avx512vbmi2) &&
3382 Arch.has(x86_feature::avx512vl)) &&
3383 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3384 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpshldvw(
3385 predicate<8, Arch> mask,
3386 simd<std::uint16_t, 8, Arch> a,
3387 simd<std::uint16_t, 8, Arch> b,
3388 simd<std::uint16_t, 8, Arch> counts) noexcept {
3389 return detail::x86_vbmi2_constant::shift<false>(
3390 a, b, counts, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
3391 }
3392
3394 template<isa<x86> Arch, unsigned Imm8>
3395 requires(!(Arch.has(x86_feature::avx512f) &&
3396 Arch.has(x86_feature::avx512bw) &&
3397 Arch.has(x86_feature::avx512vbmi2) &&
3398 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3399 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3400 native_nodiscard consteval simd<std::uint16_t, 8, Arch> vpshrdw(
3401 simd<std::uint16_t, 8, Arch> a,
3402 simd<std::uint16_t, 8, Arch> b) noexcept {
3403 return detail::x86_vbmi2_constant::shift<true>(
3404 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
3405 }
3406
3408 template<isa<x86> Arch, unsigned Imm8>
3409 requires(!(Arch.has(x86_feature::avx512f) &&
3410 Arch.has(x86_feature::avx512bw) &&
3411 Arch.has(x86_feature::avx512vbmi2) &&
3412 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3413 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3414 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpshrdw(
3415 simd<std::uint16_t, 8, Arch> source,
3416 predicate<8, Arch> mask,
3417 simd<std::uint16_t, 8, Arch> a,
3418 simd<std::uint16_t, 8, Arch> b) noexcept {
3419 return detail::x86_vbmi2_constant::shift<true>(
3420 a, b, Imm8, source, mask.to_bitset());
3421 }
3422
3424 template<isa<x86> Arch, unsigned Imm8>
3425 requires(!(Arch.has(x86_feature::avx512f) &&
3426 Arch.has(x86_feature::avx512bw) &&
3427 Arch.has(x86_feature::avx512vbmi2) &&
3428 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3429 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3430 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpshrdw(
3431 predicate<8, Arch> mask,
3432 simd<std::uint16_t, 8, Arch> a,
3433 simd<std::uint16_t, 8, Arch> b) noexcept {
3434 return detail::x86_vbmi2_constant::shift<true>(
3435 a, b, Imm8, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
3436 }
3437
3439 template<isa<x86> Arch>
3440 requires(!(Arch.has(x86_feature::avx512f) &&
3441 Arch.has(x86_feature::avx512bw) &&
3442 Arch.has(x86_feature::avx512vbmi2) &&
3443 Arch.has(x86_feature::avx512vl)) &&
3444 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3445 native_nodiscard consteval simd<std::uint16_t, 8, Arch> vpshrdvw(
3446 simd<std::uint16_t, 8, Arch> a,
3447 simd<std::uint16_t, 8, Arch> b,
3448 simd<std::uint16_t, 8, Arch> counts) noexcept {
3449 return detail::x86_vbmi2_constant::shift<true>(
3450 a, b, counts, simd<std::uint16_t, 8, Arch>{}, ~std::uint64_t{0});
3451 }
3452
3454 template<isa<x86> Arch>
3455 requires(!(Arch.has(x86_feature::avx512f) &&
3456 Arch.has(x86_feature::avx512bw) &&
3457 Arch.has(x86_feature::avx512vbmi2) &&
3458 Arch.has(x86_feature::avx512vl)) &&
3459 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3460 native_nodiscard consteval simd<std::uint16_t, 8, Arch> mask_vpshrdvw(
3461 simd<std::uint16_t, 8, Arch> a,
3462 predicate<8, Arch> mask,
3463 simd<std::uint16_t, 8, Arch> b,
3464 simd<std::uint16_t, 8, Arch> counts) noexcept {
3465 return detail::x86_vbmi2_constant::shift<true>(
3466 a, b, counts, a, mask.to_bitset());
3467 }
3468
3470 template<isa<x86> Arch>
3471 requires(!(Arch.has(x86_feature::avx512f) &&
3472 Arch.has(x86_feature::avx512bw) &&
3473 Arch.has(x86_feature::avx512vbmi2) &&
3474 Arch.has(x86_feature::avx512vl)) &&
3475 requires { sizeof(simd<std::uint16_t, 8, Arch>); })
3476 native_nodiscard consteval simd<std::uint16_t, 8, Arch> maskz_vpshrdvw(
3477 predicate<8, Arch> mask,
3478 simd<std::uint16_t, 8, Arch> a,
3479 simd<std::uint16_t, 8, Arch> b,
3480 simd<std::uint16_t, 8, Arch> counts) noexcept {
3481 return detail::x86_vbmi2_constant::shift<true>(
3482 a, b, counts, simd<std::uint16_t, 8, Arch>{}, mask.to_bitset());
3483 }
3484
3486 template<isa<x86> Arch, unsigned Imm8>
3487 requires(!(Arch.has(x86_feature::avx512f) &&
3488 Arch.has(x86_feature::avx512bw) &&
3489 Arch.has(x86_feature::avx512vbmi2) &&
3490 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3491 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3492 native_nodiscard consteval simd<std::uint32_t, 4, Arch> vpshldd(
3493 simd<std::uint32_t, 4, Arch> a,
3494 simd<std::uint32_t, 4, Arch> b) noexcept {
3495 return detail::x86_vbmi2_constant::shift<false>(
3496 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
3497 }
3498
3500 template<isa<x86> Arch, unsigned Imm8>
3501 requires(!(Arch.has(x86_feature::avx512f) &&
3502 Arch.has(x86_feature::avx512bw) &&
3503 Arch.has(x86_feature::avx512vbmi2) &&
3504 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3505 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3506 native_nodiscard consteval simd<std::uint32_t, 4, Arch> mask_vpshldd(
3507 simd<std::uint32_t, 4, Arch> source,
3508 predicate<4, Arch> mask,
3509 simd<std::uint32_t, 4, Arch> a,
3510 simd<std::uint32_t, 4, Arch> b) noexcept {
3511 return detail::x86_vbmi2_constant::shift<false>(
3512 a, b, Imm8, source, mask.to_bitset());
3513 }
3514
3516 template<isa<x86> Arch, unsigned Imm8>
3517 requires(!(Arch.has(x86_feature::avx512f) &&
3518 Arch.has(x86_feature::avx512bw) &&
3519 Arch.has(x86_feature::avx512vbmi2) &&
3520 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3521 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3522 native_nodiscard consteval simd<std::uint32_t, 4, Arch> maskz_vpshldd(
3523 predicate<4, Arch> mask,
3524 simd<std::uint32_t, 4, Arch> a,
3525 simd<std::uint32_t, 4, Arch> b) noexcept {
3526 return detail::x86_vbmi2_constant::shift<false>(
3527 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
3528 }
3529
3531 template<isa<x86> Arch>
3532 requires(!(Arch.has(x86_feature::avx512f) &&
3533 Arch.has(x86_feature::avx512bw) &&
3534 Arch.has(x86_feature::avx512vbmi2) &&
3535 Arch.has(x86_feature::avx512vl)) &&
3536 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3537 native_nodiscard consteval simd<std::uint32_t, 4, Arch> vpshldvd(
3538 simd<std::uint32_t, 4, Arch> a,
3539 simd<std::uint32_t, 4, Arch> b,
3540 simd<std::uint32_t, 4, Arch> counts) noexcept {
3541 return detail::x86_vbmi2_constant::shift<false>(
3542 a, b, counts, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
3543 }
3544
3546 template<isa<x86> Arch>
3547 requires(!(Arch.has(x86_feature::avx512f) &&
3548 Arch.has(x86_feature::avx512bw) &&
3549 Arch.has(x86_feature::avx512vbmi2) &&
3550 Arch.has(x86_feature::avx512vl)) &&
3551 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3552 native_nodiscard consteval simd<std::uint32_t, 4, Arch> mask_vpshldvd(
3553 simd<std::uint32_t, 4, Arch> a,
3554 predicate<4, Arch> mask,
3555 simd<std::uint32_t, 4, Arch> b,
3556 simd<std::uint32_t, 4, Arch> counts) noexcept {
3557 return detail::x86_vbmi2_constant::shift<false>(
3558 a, b, counts, a, mask.to_bitset());
3559 }
3560
3562 template<isa<x86> Arch>
3563 requires(!(Arch.has(x86_feature::avx512f) &&
3564 Arch.has(x86_feature::avx512bw) &&
3565 Arch.has(x86_feature::avx512vbmi2) &&
3566 Arch.has(x86_feature::avx512vl)) &&
3567 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3568 native_nodiscard consteval simd<std::uint32_t, 4, Arch> maskz_vpshldvd(
3569 predicate<4, Arch> mask,
3570 simd<std::uint32_t, 4, Arch> a,
3571 simd<std::uint32_t, 4, Arch> b,
3572 simd<std::uint32_t, 4, Arch> counts) noexcept {
3573 return detail::x86_vbmi2_constant::shift<false>(
3574 a, b, counts, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
3575 }
3576
3578 template<isa<x86> Arch, unsigned Imm8>
3579 requires(!(Arch.has(x86_feature::avx512f) &&
3580 Arch.has(x86_feature::avx512bw) &&
3581 Arch.has(x86_feature::avx512vbmi2) &&
3582 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3583 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3584 native_nodiscard consteval simd<std::uint32_t, 4, Arch> vpshrdd(
3585 simd<std::uint32_t, 4, Arch> a,
3586 simd<std::uint32_t, 4, Arch> b) noexcept {
3587 return detail::x86_vbmi2_constant::shift<true>(
3588 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
3589 }
3590
3592 template<isa<x86> Arch, unsigned Imm8>
3593 requires(!(Arch.has(x86_feature::avx512f) &&
3594 Arch.has(x86_feature::avx512bw) &&
3595 Arch.has(x86_feature::avx512vbmi2) &&
3596 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3597 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3598 native_nodiscard consteval simd<std::uint32_t, 4, Arch> mask_vpshrdd(
3599 simd<std::uint32_t, 4, Arch> source,
3600 predicate<4, Arch> mask,
3601 simd<std::uint32_t, 4, Arch> a,
3602 simd<std::uint32_t, 4, Arch> b) noexcept {
3603 return detail::x86_vbmi2_constant::shift<true>(
3604 a, b, Imm8, source, mask.to_bitset());
3605 }
3606
3608 template<isa<x86> Arch, unsigned Imm8>
3609 requires(!(Arch.has(x86_feature::avx512f) &&
3610 Arch.has(x86_feature::avx512bw) &&
3611 Arch.has(x86_feature::avx512vbmi2) &&
3612 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3613 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3614 native_nodiscard consteval simd<std::uint32_t, 4, Arch> maskz_vpshrdd(
3615 predicate<4, Arch> mask,
3616 simd<std::uint32_t, 4, Arch> a,
3617 simd<std::uint32_t, 4, Arch> b) noexcept {
3618 return detail::x86_vbmi2_constant::shift<true>(
3619 a, b, Imm8, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
3620 }
3621
3623 template<isa<x86> Arch>
3624 requires(!(Arch.has(x86_feature::avx512f) &&
3625 Arch.has(x86_feature::avx512bw) &&
3626 Arch.has(x86_feature::avx512vbmi2) &&
3627 Arch.has(x86_feature::avx512vl)) &&
3628 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3629 native_nodiscard consteval simd<std::uint32_t, 4, Arch> vpshrdvd(
3630 simd<std::uint32_t, 4, Arch> a,
3631 simd<std::uint32_t, 4, Arch> b,
3632 simd<std::uint32_t, 4, Arch> counts) noexcept {
3633 return detail::x86_vbmi2_constant::shift<true>(
3634 a, b, counts, simd<std::uint32_t, 4, Arch>{}, ~std::uint64_t{0});
3635 }
3636
3638 template<isa<x86> Arch>
3639 requires(!(Arch.has(x86_feature::avx512f) &&
3640 Arch.has(x86_feature::avx512bw) &&
3641 Arch.has(x86_feature::avx512vbmi2) &&
3642 Arch.has(x86_feature::avx512vl)) &&
3643 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3644 native_nodiscard consteval simd<std::uint32_t, 4, Arch> mask_vpshrdvd(
3645 simd<std::uint32_t, 4, Arch> a,
3646 predicate<4, Arch> mask,
3647 simd<std::uint32_t, 4, Arch> b,
3648 simd<std::uint32_t, 4, Arch> counts) noexcept {
3649 return detail::x86_vbmi2_constant::shift<true>(
3650 a, b, counts, a, mask.to_bitset());
3651 }
3652
3654 template<isa<x86> Arch>
3655 requires(!(Arch.has(x86_feature::avx512f) &&
3656 Arch.has(x86_feature::avx512bw) &&
3657 Arch.has(x86_feature::avx512vbmi2) &&
3658 Arch.has(x86_feature::avx512vl)) &&
3659 requires { sizeof(simd<std::uint32_t, 4, Arch>); })
3660 native_nodiscard consteval simd<std::uint32_t, 4, Arch> maskz_vpshrdvd(
3661 predicate<4, Arch> mask,
3662 simd<std::uint32_t, 4, Arch> a,
3663 simd<std::uint32_t, 4, Arch> b,
3664 simd<std::uint32_t, 4, Arch> counts) noexcept {
3665 return detail::x86_vbmi2_constant::shift<true>(
3666 a, b, counts, simd<std::uint32_t, 4, Arch>{}, mask.to_bitset());
3667 }
3668
3670 template<isa<x86> Arch, unsigned Imm8>
3671 requires(!(Arch.has(x86_feature::avx512f) &&
3672 Arch.has(x86_feature::avx512bw) &&
3673 Arch.has(x86_feature::avx512vbmi2) &&
3674 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3675 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3676 native_nodiscard consteval simd<std::uint64_t, 2, Arch> vpshldq(
3677 simd<std::uint64_t, 2, Arch> a,
3678 simd<std::uint64_t, 2, Arch> b) noexcept {
3679 return detail::x86_vbmi2_constant::shift<false>(
3680 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
3681 }
3682
3684 template<isa<x86> Arch, unsigned Imm8>
3685 requires(!(Arch.has(x86_feature::avx512f) &&
3686 Arch.has(x86_feature::avx512bw) &&
3687 Arch.has(x86_feature::avx512vbmi2) &&
3688 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3689 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3690 native_nodiscard consteval simd<std::uint64_t, 2, Arch> mask_vpshldq(
3691 simd<std::uint64_t, 2, Arch> source,
3692 predicate<2, Arch> mask,
3693 simd<std::uint64_t, 2, Arch> a,
3694 simd<std::uint64_t, 2, Arch> b) noexcept {
3695 return detail::x86_vbmi2_constant::shift<false>(
3696 a, b, Imm8, source, mask.to_bitset());
3697 }
3698
3700 template<isa<x86> Arch, unsigned Imm8>
3701 requires(!(Arch.has(x86_feature::avx512f) &&
3702 Arch.has(x86_feature::avx512bw) &&
3703 Arch.has(x86_feature::avx512vbmi2) &&
3704 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3705 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3706 native_nodiscard consteval simd<std::uint64_t, 2, Arch> maskz_vpshldq(
3707 predicate<2, Arch> mask,
3708 simd<std::uint64_t, 2, Arch> a,
3709 simd<std::uint64_t, 2, Arch> b) noexcept {
3710 return detail::x86_vbmi2_constant::shift<false>(
3711 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
3712 }
3713
3715 template<isa<x86> Arch>
3716 requires(!(Arch.has(x86_feature::avx512f) &&
3717 Arch.has(x86_feature::avx512bw) &&
3718 Arch.has(x86_feature::avx512vbmi2) &&
3719 Arch.has(x86_feature::avx512vl)) &&
3720 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3721 native_nodiscard consteval simd<std::uint64_t, 2, Arch> vpshldvq(
3722 simd<std::uint64_t, 2, Arch> a,
3723 simd<std::uint64_t, 2, Arch> b,
3724 simd<std::uint64_t, 2, Arch> counts) noexcept {
3725 return detail::x86_vbmi2_constant::shift<false>(
3726 a, b, counts, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
3727 }
3728
3730 template<isa<x86> Arch>
3731 requires(!(Arch.has(x86_feature::avx512f) &&
3732 Arch.has(x86_feature::avx512bw) &&
3733 Arch.has(x86_feature::avx512vbmi2) &&
3734 Arch.has(x86_feature::avx512vl)) &&
3735 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3736 native_nodiscard consteval simd<std::uint64_t, 2, Arch> mask_vpshldvq(
3737 simd<std::uint64_t, 2, Arch> a,
3738 predicate<2, Arch> mask,
3739 simd<std::uint64_t, 2, Arch> b,
3740 simd<std::uint64_t, 2, Arch> counts) noexcept {
3741 return detail::x86_vbmi2_constant::shift<false>(
3742 a, b, counts, a, mask.to_bitset());
3743 }
3744
3746 template<isa<x86> Arch>
3747 requires(!(Arch.has(x86_feature::avx512f) &&
3748 Arch.has(x86_feature::avx512bw) &&
3749 Arch.has(x86_feature::avx512vbmi2) &&
3750 Arch.has(x86_feature::avx512vl)) &&
3751 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3752 native_nodiscard consteval simd<std::uint64_t, 2, Arch> maskz_vpshldvq(
3753 predicate<2, Arch> mask,
3754 simd<std::uint64_t, 2, Arch> a,
3755 simd<std::uint64_t, 2, Arch> b,
3756 simd<std::uint64_t, 2, Arch> counts) noexcept {
3757 return detail::x86_vbmi2_constant::shift<false>(
3758 a, b, counts, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
3759 }
3760
3762 template<isa<x86> Arch, unsigned Imm8>
3763 requires(!(Arch.has(x86_feature::avx512f) &&
3764 Arch.has(x86_feature::avx512bw) &&
3765 Arch.has(x86_feature::avx512vbmi2) &&
3766 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3767 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3768 native_nodiscard consteval simd<std::uint64_t, 2, Arch> vpshrdq(
3769 simd<std::uint64_t, 2, Arch> a,
3770 simd<std::uint64_t, 2, Arch> b) noexcept {
3771 return detail::x86_vbmi2_constant::shift<true>(
3772 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
3773 }
3774
3776 template<isa<x86> Arch, unsigned Imm8>
3777 requires(!(Arch.has(x86_feature::avx512f) &&
3778 Arch.has(x86_feature::avx512bw) &&
3779 Arch.has(x86_feature::avx512vbmi2) &&
3780 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3781 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3782 native_nodiscard consteval simd<std::uint64_t, 2, Arch> mask_vpshrdq(
3783 simd<std::uint64_t, 2, Arch> source,
3784 predicate<2, Arch> mask,
3785 simd<std::uint64_t, 2, Arch> a,
3786 simd<std::uint64_t, 2, Arch> b) noexcept {
3787 return detail::x86_vbmi2_constant::shift<true>(
3788 a, b, Imm8, source, mask.to_bitset());
3789 }
3790
3792 template<isa<x86> Arch, unsigned Imm8>
3793 requires(!(Arch.has(x86_feature::avx512f) &&
3794 Arch.has(x86_feature::avx512bw) &&
3795 Arch.has(x86_feature::avx512vbmi2) &&
3796 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
3797 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3798 native_nodiscard consteval simd<std::uint64_t, 2, Arch> maskz_vpshrdq(
3799 predicate<2, Arch> mask,
3800 simd<std::uint64_t, 2, Arch> a,
3801 simd<std::uint64_t, 2, Arch> b) noexcept {
3802 return detail::x86_vbmi2_constant::shift<true>(
3803 a, b, Imm8, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
3804 }
3805
3807 template<isa<x86> Arch>
3808 requires(!(Arch.has(x86_feature::avx512f) &&
3809 Arch.has(x86_feature::avx512bw) &&
3810 Arch.has(x86_feature::avx512vbmi2) &&
3811 Arch.has(x86_feature::avx512vl)) &&
3812 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3813 native_nodiscard consteval simd<std::uint64_t, 2, Arch> vpshrdvq(
3814 simd<std::uint64_t, 2, Arch> a,
3815 simd<std::uint64_t, 2, Arch> b,
3816 simd<std::uint64_t, 2, Arch> counts) noexcept {
3817 return detail::x86_vbmi2_constant::shift<true>(
3818 a, b, counts, simd<std::uint64_t, 2, Arch>{}, ~std::uint64_t{0});
3819 }
3820
3822 template<isa<x86> Arch>
3823 requires(!(Arch.has(x86_feature::avx512f) &&
3824 Arch.has(x86_feature::avx512bw) &&
3825 Arch.has(x86_feature::avx512vbmi2) &&
3826 Arch.has(x86_feature::avx512vl)) &&
3827 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3828 native_nodiscard consteval simd<std::uint64_t, 2, Arch> mask_vpshrdvq(
3829 simd<std::uint64_t, 2, Arch> a,
3830 predicate<2, Arch> mask,
3831 simd<std::uint64_t, 2, Arch> b,
3832 simd<std::uint64_t, 2, Arch> counts) noexcept {
3833 return detail::x86_vbmi2_constant::shift<true>(
3834 a, b, counts, a, mask.to_bitset());
3835 }
3836
3838 template<isa<x86> Arch>
3839 requires(!(Arch.has(x86_feature::avx512f) &&
3840 Arch.has(x86_feature::avx512bw) &&
3841 Arch.has(x86_feature::avx512vbmi2) &&
3842 Arch.has(x86_feature::avx512vl)) &&
3843 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
3844 native_nodiscard consteval simd<std::uint64_t, 2, Arch> maskz_vpshrdvq(
3845 predicate<2, Arch> mask,
3846 simd<std::uint64_t, 2, Arch> a,
3847 simd<std::uint64_t, 2, Arch> b,
3848 simd<std::uint64_t, 2, Arch> counts) noexcept {
3849 return detail::x86_vbmi2_constant::shift<true>(
3850 a, b, counts, simd<std::uint64_t, 2, Arch>{}, mask.to_bitset());
3851 }
3852
3854 template<isa<x86> Arch>
3855 requires(!(Arch.has(x86_feature::avx512f) &&
3856 Arch.has(x86_feature::avx512bw) &&
3857 Arch.has(x86_feature::avx512vbmi2) &&
3858 Arch.has(x86_feature::avx512vl)) &&
3859 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3860 native_nodiscard consteval simd<std::uint8_t, 32, Arch> mask_vpcompressb(
3861 simd<std::uint8_t, 32, Arch> source,
3862 predicate<32, Arch> mask,
3863 simd<std::uint8_t, 32, Arch> value) noexcept {
3864 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
3865 }
3866
3868 template<isa<x86> Arch>
3869 requires(!(Arch.has(x86_feature::avx512f) &&
3870 Arch.has(x86_feature::avx512bw) &&
3871 Arch.has(x86_feature::avx512vbmi2) &&
3872 Arch.has(x86_feature::avx512vl)) &&
3873 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3874 native_nodiscard consteval simd<std::uint8_t, 32, Arch> maskz_vpcompressb(
3875 predicate<32, Arch> mask,
3876 simd<std::uint8_t, 32, Arch> value) noexcept {
3877 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint8_t, 32, Arch>{}, mask.to_bitset(), value);
3878 }
3879
3881 template<isa<x86> Arch>
3882 requires(!(Arch.has(x86_feature::avx512f) &&
3883 Arch.has(x86_feature::avx512bw) &&
3884 Arch.has(x86_feature::avx512vbmi2) &&
3885 Arch.has(x86_feature::avx512vl)) &&
3886 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3887 consteval void mask_vpcompressb(
3888 std::uint8_t * destination,
3889 predicate<32, Arch> mask,
3890 simd<std::uint8_t, 32, Arch> value) noexcept {
3891 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
3892 }
3893
3895 template<isa<x86> Arch>
3896 requires(!(Arch.has(x86_feature::avx512f) &&
3897 Arch.has(x86_feature::avx512bw) &&
3898 Arch.has(x86_feature::avx512vbmi2) &&
3899 Arch.has(x86_feature::avx512vl)) &&
3900 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3901 native_nodiscard consteval simd<std::uint8_t, 32, Arch> mask_vpexpandb(
3902 simd<std::uint8_t, 32, Arch> source,
3903 predicate<32, Arch> mask,
3904 simd<std::uint8_t, 32, Arch> value) noexcept {
3905 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
3906 }
3907
3909 template<isa<x86> Arch>
3910 requires(!(Arch.has(x86_feature::avx512f) &&
3911 Arch.has(x86_feature::avx512bw) &&
3912 Arch.has(x86_feature::avx512vbmi2) &&
3913 Arch.has(x86_feature::avx512vl)) &&
3914 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3915 native_nodiscard consteval simd<std::uint8_t, 32, Arch> maskz_vpexpandb(
3916 predicate<32, Arch> mask,
3917 simd<std::uint8_t, 32, Arch> value) noexcept {
3918 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint8_t, 32, Arch>{}, mask.to_bitset(), value);
3919 }
3920
3922 template<isa<x86> Arch, class T>
3923 requires(!(Arch.has(x86_feature::avx512f) &&
3924 Arch.has(x86_feature::avx512bw) &&
3925 Arch.has(x86_feature::avx512vbmi2) &&
3926 Arch.has(x86_feature::avx512vl)) &&
3927 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>) &&
3928 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3929 native_nodiscard consteval simd<std::uint8_t, 32, Arch> mask_vpexpandb(
3930 simd<std::uint8_t, 32, Arch> source,
3931 predicate<32, Arch> mask,
3932 T * memory) noexcept {
3933 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
3934 }
3935
3937 template<isa<x86> Arch, class T>
3938 requires(!(Arch.has(x86_feature::avx512f) &&
3939 Arch.has(x86_feature::avx512bw) &&
3940 Arch.has(x86_feature::avx512vbmi2) &&
3941 Arch.has(x86_feature::avx512vl)) &&
3942 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>) &&
3943 requires { sizeof(simd<std::uint8_t, 32, Arch>); })
3944 native_nodiscard consteval simd<std::uint8_t, 32, Arch> maskz_vpexpandb(
3945 predicate<32, Arch> mask,
3946 T * memory) noexcept {
3947 return detail::x86_vbmi2_constant::expand_load(simd<std::uint8_t, 32, Arch>{}, mask.to_bitset(), memory);
3948 }
3949
3951 template<isa<x86> Arch>
3952 requires(!(Arch.has(x86_feature::avx512f) &&
3953 Arch.has(x86_feature::avx512bw) &&
3954 Arch.has(x86_feature::avx512vbmi2) &&
3955 Arch.has(x86_feature::avx512vl)) &&
3956 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
3957 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpcompressw(
3958 simd<std::uint16_t, 16, Arch> source,
3959 predicate<16, Arch> mask,
3960 simd<std::uint16_t, 16, Arch> value) noexcept {
3961 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
3962 }
3963
3965 template<isa<x86> Arch>
3966 requires(!(Arch.has(x86_feature::avx512f) &&
3967 Arch.has(x86_feature::avx512bw) &&
3968 Arch.has(x86_feature::avx512vbmi2) &&
3969 Arch.has(x86_feature::avx512vl)) &&
3970 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
3971 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpcompressw(
3972 predicate<16, Arch> mask,
3973 simd<std::uint16_t, 16, Arch> value) noexcept {
3974 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint16_t, 16, Arch>{}, mask.to_bitset(), value);
3975 }
3976
3978 template<isa<x86> Arch>
3979 requires(!(Arch.has(x86_feature::avx512f) &&
3980 Arch.has(x86_feature::avx512bw) &&
3981 Arch.has(x86_feature::avx512vbmi2) &&
3982 Arch.has(x86_feature::avx512vl)) &&
3983 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
3984 consteval void mask_vpcompressw(
3985 std::uint16_t * destination,
3986 predicate<16, Arch> mask,
3987 simd<std::uint16_t, 16, Arch> value) noexcept {
3988 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
3989 }
3990
3992 template<isa<x86> Arch>
3993 requires(!(Arch.has(x86_feature::avx512f) &&
3994 Arch.has(x86_feature::avx512bw) &&
3995 Arch.has(x86_feature::avx512vbmi2) &&
3996 Arch.has(x86_feature::avx512vl)) &&
3997 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
3998 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpexpandw(
3999 simd<std::uint16_t, 16, Arch> source,
4000 predicate<16, Arch> mask,
4001 simd<std::uint16_t, 16, Arch> value) noexcept {
4002 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
4003 }
4004
4006 template<isa<x86> Arch>
4007 requires(!(Arch.has(x86_feature::avx512f) &&
4008 Arch.has(x86_feature::avx512bw) &&
4009 Arch.has(x86_feature::avx512vbmi2) &&
4010 Arch.has(x86_feature::avx512vl)) &&
4011 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4012 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpexpandw(
4013 predicate<16, Arch> mask,
4014 simd<std::uint16_t, 16, Arch> value) noexcept {
4015 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint16_t, 16, Arch>{}, mask.to_bitset(), value);
4016 }
4017
4019 template<isa<x86> Arch, class T>
4020 requires(!(Arch.has(x86_feature::avx512f) &&
4021 Arch.has(x86_feature::avx512bw) &&
4022 Arch.has(x86_feature::avx512vbmi2) &&
4023 Arch.has(x86_feature::avx512vl)) &&
4024 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>) &&
4025 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4026 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpexpandw(
4027 simd<std::uint16_t, 16, Arch> source,
4028 predicate<16, Arch> mask,
4029 T * memory) noexcept {
4030 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
4031 }
4032
4034 template<isa<x86> Arch, class T>
4035 requires(!(Arch.has(x86_feature::avx512f) &&
4036 Arch.has(x86_feature::avx512bw) &&
4037 Arch.has(x86_feature::avx512vbmi2) &&
4038 Arch.has(x86_feature::avx512vl)) &&
4039 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>) &&
4040 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4041 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpexpandw(
4042 predicate<16, Arch> mask,
4043 T * memory) noexcept {
4044 return detail::x86_vbmi2_constant::expand_load(simd<std::uint16_t, 16, Arch>{}, mask.to_bitset(), memory);
4045 }
4046
4048 template<isa<x86> Arch, unsigned Imm8>
4049 requires(!(Arch.has(x86_feature::avx512f) &&
4050 Arch.has(x86_feature::avx512bw) &&
4051 Arch.has(x86_feature::avx512vbmi2) &&
4052 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4053 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4054 native_nodiscard consteval simd<std::uint16_t, 16, Arch> vpshldw(
4055 simd<std::uint16_t, 16, Arch> a,
4056 simd<std::uint16_t, 16, Arch> b) noexcept {
4057 return detail::x86_vbmi2_constant::shift<false>(
4058 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
4059 }
4060
4062 template<isa<x86> Arch, unsigned Imm8>
4063 requires(!(Arch.has(x86_feature::avx512f) &&
4064 Arch.has(x86_feature::avx512bw) &&
4065 Arch.has(x86_feature::avx512vbmi2) &&
4066 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4067 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4068 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpshldw(
4069 simd<std::uint16_t, 16, Arch> source,
4070 predicate<16, Arch> mask,
4071 simd<std::uint16_t, 16, Arch> a,
4072 simd<std::uint16_t, 16, Arch> b) noexcept {
4073 return detail::x86_vbmi2_constant::shift<false>(
4074 a, b, Imm8, source, mask.to_bitset());
4075 }
4076
4078 template<isa<x86> Arch, unsigned Imm8>
4079 requires(!(Arch.has(x86_feature::avx512f) &&
4080 Arch.has(x86_feature::avx512bw) &&
4081 Arch.has(x86_feature::avx512vbmi2) &&
4082 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4083 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4084 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpshldw(
4085 predicate<16, Arch> mask,
4086 simd<std::uint16_t, 16, Arch> a,
4087 simd<std::uint16_t, 16, Arch> b) noexcept {
4088 return detail::x86_vbmi2_constant::shift<false>(
4089 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
4090 }
4091
4093 template<isa<x86> Arch>
4094 requires(!(Arch.has(x86_feature::avx512f) &&
4095 Arch.has(x86_feature::avx512bw) &&
4096 Arch.has(x86_feature::avx512vbmi2) &&
4097 Arch.has(x86_feature::avx512vl)) &&
4098 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4099 native_nodiscard consteval simd<std::uint16_t, 16, Arch> vpshldvw(
4100 simd<std::uint16_t, 16, Arch> a,
4101 simd<std::uint16_t, 16, Arch> b,
4102 simd<std::uint16_t, 16, Arch> counts) noexcept {
4103 return detail::x86_vbmi2_constant::shift<false>(
4104 a, b, counts, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
4105 }
4106
4108 template<isa<x86> Arch>
4109 requires(!(Arch.has(x86_feature::avx512f) &&
4110 Arch.has(x86_feature::avx512bw) &&
4111 Arch.has(x86_feature::avx512vbmi2) &&
4112 Arch.has(x86_feature::avx512vl)) &&
4113 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4114 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpshldvw(
4115 simd<std::uint16_t, 16, Arch> a,
4116 predicate<16, Arch> mask,
4117 simd<std::uint16_t, 16, Arch> b,
4118 simd<std::uint16_t, 16, Arch> counts) noexcept {
4119 return detail::x86_vbmi2_constant::shift<false>(
4120 a, b, counts, a, mask.to_bitset());
4121 }
4122
4124 template<isa<x86> Arch>
4125 requires(!(Arch.has(x86_feature::avx512f) &&
4126 Arch.has(x86_feature::avx512bw) &&
4127 Arch.has(x86_feature::avx512vbmi2) &&
4128 Arch.has(x86_feature::avx512vl)) &&
4129 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4130 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpshldvw(
4131 predicate<16, Arch> mask,
4132 simd<std::uint16_t, 16, Arch> a,
4133 simd<std::uint16_t, 16, Arch> b,
4134 simd<std::uint16_t, 16, Arch> counts) noexcept {
4135 return detail::x86_vbmi2_constant::shift<false>(
4136 a, b, counts, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
4137 }
4138
4140 template<isa<x86> Arch, unsigned Imm8>
4141 requires(!(Arch.has(x86_feature::avx512f) &&
4142 Arch.has(x86_feature::avx512bw) &&
4143 Arch.has(x86_feature::avx512vbmi2) &&
4144 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4145 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4146 native_nodiscard consteval simd<std::uint16_t, 16, Arch> vpshrdw(
4147 simd<std::uint16_t, 16, Arch> a,
4148 simd<std::uint16_t, 16, Arch> b) noexcept {
4149 return detail::x86_vbmi2_constant::shift<true>(
4150 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
4151 }
4152
4154 template<isa<x86> Arch, unsigned Imm8>
4155 requires(!(Arch.has(x86_feature::avx512f) &&
4156 Arch.has(x86_feature::avx512bw) &&
4157 Arch.has(x86_feature::avx512vbmi2) &&
4158 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4159 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4160 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpshrdw(
4161 simd<std::uint16_t, 16, Arch> source,
4162 predicate<16, Arch> mask,
4163 simd<std::uint16_t, 16, Arch> a,
4164 simd<std::uint16_t, 16, Arch> b) noexcept {
4165 return detail::x86_vbmi2_constant::shift<true>(
4166 a, b, Imm8, source, mask.to_bitset());
4167 }
4168
4170 template<isa<x86> Arch, unsigned Imm8>
4171 requires(!(Arch.has(x86_feature::avx512f) &&
4172 Arch.has(x86_feature::avx512bw) &&
4173 Arch.has(x86_feature::avx512vbmi2) &&
4174 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4175 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4176 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpshrdw(
4177 predicate<16, Arch> mask,
4178 simd<std::uint16_t, 16, Arch> a,
4179 simd<std::uint16_t, 16, Arch> b) noexcept {
4180 return detail::x86_vbmi2_constant::shift<true>(
4181 a, b, Imm8, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
4182 }
4183
4185 template<isa<x86> Arch>
4186 requires(!(Arch.has(x86_feature::avx512f) &&
4187 Arch.has(x86_feature::avx512bw) &&
4188 Arch.has(x86_feature::avx512vbmi2) &&
4189 Arch.has(x86_feature::avx512vl)) &&
4190 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4191 native_nodiscard consteval simd<std::uint16_t, 16, Arch> vpshrdvw(
4192 simd<std::uint16_t, 16, Arch> a,
4193 simd<std::uint16_t, 16, Arch> b,
4194 simd<std::uint16_t, 16, Arch> counts) noexcept {
4195 return detail::x86_vbmi2_constant::shift<true>(
4196 a, b, counts, simd<std::uint16_t, 16, Arch>{}, ~std::uint64_t{0});
4197 }
4198
4200 template<isa<x86> Arch>
4201 requires(!(Arch.has(x86_feature::avx512f) &&
4202 Arch.has(x86_feature::avx512bw) &&
4203 Arch.has(x86_feature::avx512vbmi2) &&
4204 Arch.has(x86_feature::avx512vl)) &&
4205 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4206 native_nodiscard consteval simd<std::uint16_t, 16, Arch> mask_vpshrdvw(
4207 simd<std::uint16_t, 16, Arch> a,
4208 predicate<16, Arch> mask,
4209 simd<std::uint16_t, 16, Arch> b,
4210 simd<std::uint16_t, 16, Arch> counts) noexcept {
4211 return detail::x86_vbmi2_constant::shift<true>(
4212 a, b, counts, a, mask.to_bitset());
4213 }
4214
4216 template<isa<x86> Arch>
4217 requires(!(Arch.has(x86_feature::avx512f) &&
4218 Arch.has(x86_feature::avx512bw) &&
4219 Arch.has(x86_feature::avx512vbmi2) &&
4220 Arch.has(x86_feature::avx512vl)) &&
4221 requires { sizeof(simd<std::uint16_t, 16, Arch>); })
4222 native_nodiscard consteval simd<std::uint16_t, 16, Arch> maskz_vpshrdvw(
4223 predicate<16, Arch> mask,
4224 simd<std::uint16_t, 16, Arch> a,
4225 simd<std::uint16_t, 16, Arch> b,
4226 simd<std::uint16_t, 16, Arch> counts) noexcept {
4227 return detail::x86_vbmi2_constant::shift<true>(
4228 a, b, counts, simd<std::uint16_t, 16, Arch>{}, mask.to_bitset());
4229 }
4230
4232 template<isa<x86> Arch, unsigned Imm8>
4233 requires(!(Arch.has(x86_feature::avx512f) &&
4234 Arch.has(x86_feature::avx512bw) &&
4235 Arch.has(x86_feature::avx512vbmi2) &&
4236 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4237 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4238 native_nodiscard consteval simd<std::uint32_t, 8, Arch> vpshldd(
4239 simd<std::uint32_t, 8, Arch> a,
4240 simd<std::uint32_t, 8, Arch> b) noexcept {
4241 return detail::x86_vbmi2_constant::shift<false>(
4242 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
4243 }
4244
4246 template<isa<x86> Arch, unsigned Imm8>
4247 requires(!(Arch.has(x86_feature::avx512f) &&
4248 Arch.has(x86_feature::avx512bw) &&
4249 Arch.has(x86_feature::avx512vbmi2) &&
4250 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4251 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4252 native_nodiscard consteval simd<std::uint32_t, 8, Arch> mask_vpshldd(
4253 simd<std::uint32_t, 8, Arch> source,
4254 predicate<8, Arch> mask,
4255 simd<std::uint32_t, 8, Arch> a,
4256 simd<std::uint32_t, 8, Arch> b) noexcept {
4257 return detail::x86_vbmi2_constant::shift<false>(
4258 a, b, Imm8, source, mask.to_bitset());
4259 }
4260
4262 template<isa<x86> Arch, unsigned Imm8>
4263 requires(!(Arch.has(x86_feature::avx512f) &&
4264 Arch.has(x86_feature::avx512bw) &&
4265 Arch.has(x86_feature::avx512vbmi2) &&
4266 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4267 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4268 native_nodiscard consteval simd<std::uint32_t, 8, Arch> maskz_vpshldd(
4269 predicate<8, Arch> mask,
4270 simd<std::uint32_t, 8, Arch> a,
4271 simd<std::uint32_t, 8, Arch> b) noexcept {
4272 return detail::x86_vbmi2_constant::shift<false>(
4273 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
4274 }
4275
4277 template<isa<x86> Arch>
4278 requires(!(Arch.has(x86_feature::avx512f) &&
4279 Arch.has(x86_feature::avx512bw) &&
4280 Arch.has(x86_feature::avx512vbmi2) &&
4281 Arch.has(x86_feature::avx512vl)) &&
4282 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4283 native_nodiscard consteval simd<std::uint32_t, 8, Arch> vpshldvd(
4284 simd<std::uint32_t, 8, Arch> a,
4285 simd<std::uint32_t, 8, Arch> b,
4286 simd<std::uint32_t, 8, Arch> counts) noexcept {
4287 return detail::x86_vbmi2_constant::shift<false>(
4288 a, b, counts, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
4289 }
4290
4292 template<isa<x86> Arch>
4293 requires(!(Arch.has(x86_feature::avx512f) &&
4294 Arch.has(x86_feature::avx512bw) &&
4295 Arch.has(x86_feature::avx512vbmi2) &&
4296 Arch.has(x86_feature::avx512vl)) &&
4297 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4298 native_nodiscard consteval simd<std::uint32_t, 8, Arch> mask_vpshldvd(
4299 simd<std::uint32_t, 8, Arch> a,
4300 predicate<8, Arch> mask,
4301 simd<std::uint32_t, 8, Arch> b,
4302 simd<std::uint32_t, 8, Arch> counts) noexcept {
4303 return detail::x86_vbmi2_constant::shift<false>(
4304 a, b, counts, a, mask.to_bitset());
4305 }
4306
4308 template<isa<x86> Arch>
4309 requires(!(Arch.has(x86_feature::avx512f) &&
4310 Arch.has(x86_feature::avx512bw) &&
4311 Arch.has(x86_feature::avx512vbmi2) &&
4312 Arch.has(x86_feature::avx512vl)) &&
4313 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4314 native_nodiscard consteval simd<std::uint32_t, 8, Arch> maskz_vpshldvd(
4315 predicate<8, Arch> mask,
4316 simd<std::uint32_t, 8, Arch> a,
4317 simd<std::uint32_t, 8, Arch> b,
4318 simd<std::uint32_t, 8, Arch> counts) noexcept {
4319 return detail::x86_vbmi2_constant::shift<false>(
4320 a, b, counts, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
4321 }
4322
4324 template<isa<x86> Arch, unsigned Imm8>
4325 requires(!(Arch.has(x86_feature::avx512f) &&
4326 Arch.has(x86_feature::avx512bw) &&
4327 Arch.has(x86_feature::avx512vbmi2) &&
4328 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4329 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4330 native_nodiscard consteval simd<std::uint32_t, 8, Arch> vpshrdd(
4331 simd<std::uint32_t, 8, Arch> a,
4332 simd<std::uint32_t, 8, Arch> b) noexcept {
4333 return detail::x86_vbmi2_constant::shift<true>(
4334 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
4335 }
4336
4338 template<isa<x86> Arch, unsigned Imm8>
4339 requires(!(Arch.has(x86_feature::avx512f) &&
4340 Arch.has(x86_feature::avx512bw) &&
4341 Arch.has(x86_feature::avx512vbmi2) &&
4342 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4343 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4344 native_nodiscard consteval simd<std::uint32_t, 8, Arch> mask_vpshrdd(
4345 simd<std::uint32_t, 8, Arch> source,
4346 predicate<8, Arch> mask,
4347 simd<std::uint32_t, 8, Arch> a,
4348 simd<std::uint32_t, 8, Arch> b) noexcept {
4349 return detail::x86_vbmi2_constant::shift<true>(
4350 a, b, Imm8, source, mask.to_bitset());
4351 }
4352
4354 template<isa<x86> Arch, unsigned Imm8>
4355 requires(!(Arch.has(x86_feature::avx512f) &&
4356 Arch.has(x86_feature::avx512bw) &&
4357 Arch.has(x86_feature::avx512vbmi2) &&
4358 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4359 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4360 native_nodiscard consteval simd<std::uint32_t, 8, Arch> maskz_vpshrdd(
4361 predicate<8, Arch> mask,
4362 simd<std::uint32_t, 8, Arch> a,
4363 simd<std::uint32_t, 8, Arch> b) noexcept {
4364 return detail::x86_vbmi2_constant::shift<true>(
4365 a, b, Imm8, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
4366 }
4367
4369 template<isa<x86> Arch>
4370 requires(!(Arch.has(x86_feature::avx512f) &&
4371 Arch.has(x86_feature::avx512bw) &&
4372 Arch.has(x86_feature::avx512vbmi2) &&
4373 Arch.has(x86_feature::avx512vl)) &&
4374 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4375 native_nodiscard consteval simd<std::uint32_t, 8, Arch> vpshrdvd(
4376 simd<std::uint32_t, 8, Arch> a,
4377 simd<std::uint32_t, 8, Arch> b,
4378 simd<std::uint32_t, 8, Arch> counts) noexcept {
4379 return detail::x86_vbmi2_constant::shift<true>(
4380 a, b, counts, simd<std::uint32_t, 8, Arch>{}, ~std::uint64_t{0});
4381 }
4382
4384 template<isa<x86> Arch>
4385 requires(!(Arch.has(x86_feature::avx512f) &&
4386 Arch.has(x86_feature::avx512bw) &&
4387 Arch.has(x86_feature::avx512vbmi2) &&
4388 Arch.has(x86_feature::avx512vl)) &&
4389 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4390 native_nodiscard consteval simd<std::uint32_t, 8, Arch> mask_vpshrdvd(
4391 simd<std::uint32_t, 8, Arch> a,
4392 predicate<8, Arch> mask,
4393 simd<std::uint32_t, 8, Arch> b,
4394 simd<std::uint32_t, 8, Arch> counts) noexcept {
4395 return detail::x86_vbmi2_constant::shift<true>(
4396 a, b, counts, a, mask.to_bitset());
4397 }
4398
4400 template<isa<x86> Arch>
4401 requires(!(Arch.has(x86_feature::avx512f) &&
4402 Arch.has(x86_feature::avx512bw) &&
4403 Arch.has(x86_feature::avx512vbmi2) &&
4404 Arch.has(x86_feature::avx512vl)) &&
4405 requires { sizeof(simd<std::uint32_t, 8, Arch>); })
4406 native_nodiscard consteval simd<std::uint32_t, 8, Arch> maskz_vpshrdvd(
4407 predicate<8, Arch> mask,
4408 simd<std::uint32_t, 8, Arch> a,
4409 simd<std::uint32_t, 8, Arch> b,
4410 simd<std::uint32_t, 8, Arch> counts) noexcept {
4411 return detail::x86_vbmi2_constant::shift<true>(
4412 a, b, counts, simd<std::uint32_t, 8, Arch>{}, mask.to_bitset());
4413 }
4414
4416 template<isa<x86> Arch, unsigned Imm8>
4417 requires(!(Arch.has(x86_feature::avx512f) &&
4418 Arch.has(x86_feature::avx512bw) &&
4419 Arch.has(x86_feature::avx512vbmi2) &&
4420 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4421 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4422 native_nodiscard consteval simd<std::uint64_t, 4, Arch> vpshldq(
4423 simd<std::uint64_t, 4, Arch> a,
4424 simd<std::uint64_t, 4, Arch> b) noexcept {
4425 return detail::x86_vbmi2_constant::shift<false>(
4426 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
4427 }
4428
4430 template<isa<x86> Arch, unsigned Imm8>
4431 requires(!(Arch.has(x86_feature::avx512f) &&
4432 Arch.has(x86_feature::avx512bw) &&
4433 Arch.has(x86_feature::avx512vbmi2) &&
4434 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4435 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4436 native_nodiscard consteval simd<std::uint64_t, 4, Arch> mask_vpshldq(
4437 simd<std::uint64_t, 4, Arch> source,
4438 predicate<4, Arch> mask,
4439 simd<std::uint64_t, 4, Arch> a,
4440 simd<std::uint64_t, 4, Arch> b) noexcept {
4441 return detail::x86_vbmi2_constant::shift<false>(
4442 a, b, Imm8, source, mask.to_bitset());
4443 }
4444
4446 template<isa<x86> Arch, unsigned Imm8>
4447 requires(!(Arch.has(x86_feature::avx512f) &&
4448 Arch.has(x86_feature::avx512bw) &&
4449 Arch.has(x86_feature::avx512vbmi2) &&
4450 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4451 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4452 native_nodiscard consteval simd<std::uint64_t, 4, Arch> maskz_vpshldq(
4453 predicate<4, Arch> mask,
4454 simd<std::uint64_t, 4, Arch> a,
4455 simd<std::uint64_t, 4, Arch> b) noexcept {
4456 return detail::x86_vbmi2_constant::shift<false>(
4457 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
4458 }
4459
4461 template<isa<x86> Arch>
4462 requires(!(Arch.has(x86_feature::avx512f) &&
4463 Arch.has(x86_feature::avx512bw) &&
4464 Arch.has(x86_feature::avx512vbmi2) &&
4465 Arch.has(x86_feature::avx512vl)) &&
4466 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4467 native_nodiscard consteval simd<std::uint64_t, 4, Arch> vpshldvq(
4468 simd<std::uint64_t, 4, Arch> a,
4469 simd<std::uint64_t, 4, Arch> b,
4470 simd<std::uint64_t, 4, Arch> counts) noexcept {
4471 return detail::x86_vbmi2_constant::shift<false>(
4472 a, b, counts, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
4473 }
4474
4476 template<isa<x86> Arch>
4477 requires(!(Arch.has(x86_feature::avx512f) &&
4478 Arch.has(x86_feature::avx512bw) &&
4479 Arch.has(x86_feature::avx512vbmi2) &&
4480 Arch.has(x86_feature::avx512vl)) &&
4481 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4482 native_nodiscard consteval simd<std::uint64_t, 4, Arch> mask_vpshldvq(
4483 simd<std::uint64_t, 4, Arch> a,
4484 predicate<4, Arch> mask,
4485 simd<std::uint64_t, 4, Arch> b,
4486 simd<std::uint64_t, 4, Arch> counts) noexcept {
4487 return detail::x86_vbmi2_constant::shift<false>(
4488 a, b, counts, a, mask.to_bitset());
4489 }
4490
4492 template<isa<x86> Arch>
4493 requires(!(Arch.has(x86_feature::avx512f) &&
4494 Arch.has(x86_feature::avx512bw) &&
4495 Arch.has(x86_feature::avx512vbmi2) &&
4496 Arch.has(x86_feature::avx512vl)) &&
4497 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4498 native_nodiscard consteval simd<std::uint64_t, 4, Arch> maskz_vpshldvq(
4499 predicate<4, Arch> mask,
4500 simd<std::uint64_t, 4, Arch> a,
4501 simd<std::uint64_t, 4, Arch> b,
4502 simd<std::uint64_t, 4, Arch> counts) noexcept {
4503 return detail::x86_vbmi2_constant::shift<false>(
4504 a, b, counts, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
4505 }
4506
4508 template<isa<x86> Arch, unsigned Imm8>
4509 requires(!(Arch.has(x86_feature::avx512f) &&
4510 Arch.has(x86_feature::avx512bw) &&
4511 Arch.has(x86_feature::avx512vbmi2) &&
4512 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4513 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4514 native_nodiscard consteval simd<std::uint64_t, 4, Arch> vpshrdq(
4515 simd<std::uint64_t, 4, Arch> a,
4516 simd<std::uint64_t, 4, Arch> b) noexcept {
4517 return detail::x86_vbmi2_constant::shift<true>(
4518 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
4519 }
4520
4522 template<isa<x86> Arch, unsigned Imm8>
4523 requires(!(Arch.has(x86_feature::avx512f) &&
4524 Arch.has(x86_feature::avx512bw) &&
4525 Arch.has(x86_feature::avx512vbmi2) &&
4526 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4527 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4528 native_nodiscard consteval simd<std::uint64_t, 4, Arch> mask_vpshrdq(
4529 simd<std::uint64_t, 4, Arch> source,
4530 predicate<4, Arch> mask,
4531 simd<std::uint64_t, 4, Arch> a,
4532 simd<std::uint64_t, 4, Arch> b) noexcept {
4533 return detail::x86_vbmi2_constant::shift<true>(
4534 a, b, Imm8, source, mask.to_bitset());
4535 }
4536
4538 template<isa<x86> Arch, unsigned Imm8>
4539 requires(!(Arch.has(x86_feature::avx512f) &&
4540 Arch.has(x86_feature::avx512bw) &&
4541 Arch.has(x86_feature::avx512vbmi2) &&
4542 Arch.has(x86_feature::avx512vl)) && Imm8 <= 255 &&
4543 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4544 native_nodiscard consteval simd<std::uint64_t, 4, Arch> maskz_vpshrdq(
4545 predicate<4, Arch> mask,
4546 simd<std::uint64_t, 4, Arch> a,
4547 simd<std::uint64_t, 4, Arch> b) noexcept {
4548 return detail::x86_vbmi2_constant::shift<true>(
4549 a, b, Imm8, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
4550 }
4551
4553 template<isa<x86> Arch>
4554 requires(!(Arch.has(x86_feature::avx512f) &&
4555 Arch.has(x86_feature::avx512bw) &&
4556 Arch.has(x86_feature::avx512vbmi2) &&
4557 Arch.has(x86_feature::avx512vl)) &&
4558 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4559 native_nodiscard consteval simd<std::uint64_t, 4, Arch> vpshrdvq(
4560 simd<std::uint64_t, 4, Arch> a,
4561 simd<std::uint64_t, 4, Arch> b,
4562 simd<std::uint64_t, 4, Arch> counts) noexcept {
4563 return detail::x86_vbmi2_constant::shift<true>(
4564 a, b, counts, simd<std::uint64_t, 4, Arch>{}, ~std::uint64_t{0});
4565 }
4566
4568 template<isa<x86> Arch>
4569 requires(!(Arch.has(x86_feature::avx512f) &&
4570 Arch.has(x86_feature::avx512bw) &&
4571 Arch.has(x86_feature::avx512vbmi2) &&
4572 Arch.has(x86_feature::avx512vl)) &&
4573 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4574 native_nodiscard consteval simd<std::uint64_t, 4, Arch> mask_vpshrdvq(
4575 simd<std::uint64_t, 4, Arch> a,
4576 predicate<4, Arch> mask,
4577 simd<std::uint64_t, 4, Arch> b,
4578 simd<std::uint64_t, 4, Arch> counts) noexcept {
4579 return detail::x86_vbmi2_constant::shift<true>(
4580 a, b, counts, a, mask.to_bitset());
4581 }
4582
4584 template<isa<x86> Arch>
4585 requires(!(Arch.has(x86_feature::avx512f) &&
4586 Arch.has(x86_feature::avx512bw) &&
4587 Arch.has(x86_feature::avx512vbmi2) &&
4588 Arch.has(x86_feature::avx512vl)) &&
4589 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
4590 native_nodiscard consteval simd<std::uint64_t, 4, Arch> maskz_vpshrdvq(
4591 predicate<4, Arch> mask,
4592 simd<std::uint64_t, 4, Arch> a,
4593 simd<std::uint64_t, 4, Arch> b,
4594 simd<std::uint64_t, 4, Arch> counts) noexcept {
4595 return detail::x86_vbmi2_constant::shift<true>(
4596 a, b, counts, simd<std::uint64_t, 4, Arch>{}, mask.to_bitset());
4597 }
4598
4600 template<isa<x86> Arch>
4601 requires(!(Arch.has(x86_feature::avx512f) &&
4602 Arch.has(x86_feature::avx512bw) &&
4603 Arch.has(x86_feature::avx512vbmi2)) &&
4604 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4605 native_nodiscard consteval simd<std::uint8_t, 64, Arch> mask_vpcompressb(
4606 simd<std::uint8_t, 64, Arch> source,
4607 predicate<64, Arch> mask,
4608 simd<std::uint8_t, 64, Arch> value) noexcept {
4609 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
4610 }
4611
4613 template<isa<x86> Arch>
4614 requires(!(Arch.has(x86_feature::avx512f) &&
4615 Arch.has(x86_feature::avx512bw) &&
4616 Arch.has(x86_feature::avx512vbmi2)) &&
4617 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4618 native_nodiscard consteval simd<std::uint8_t, 64, Arch> maskz_vpcompressb(
4619 predicate<64, Arch> mask,
4620 simd<std::uint8_t, 64, Arch> value) noexcept {
4621 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint8_t, 64, Arch>{}, mask.to_bitset(), value);
4622 }
4623
4625 template<isa<x86> Arch>
4626 requires(!(Arch.has(x86_feature::avx512f) &&
4627 Arch.has(x86_feature::avx512bw) &&
4628 Arch.has(x86_feature::avx512vbmi2)) &&
4629 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4630 consteval void mask_vpcompressb(
4631 std::uint8_t * destination,
4632 predicate<64, Arch> mask,
4633 simd<std::uint8_t, 64, Arch> value) noexcept {
4634 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
4635 }
4636
4638 template<isa<x86> Arch>
4639 requires(!(Arch.has(x86_feature::avx512f) &&
4640 Arch.has(x86_feature::avx512bw) &&
4641 Arch.has(x86_feature::avx512vbmi2)) &&
4642 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4643 native_nodiscard consteval simd<std::uint8_t, 64, Arch> mask_vpexpandb(
4644 simd<std::uint8_t, 64, Arch> source,
4645 predicate<64, Arch> mask,
4646 simd<std::uint8_t, 64, Arch> value) noexcept {
4647 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
4648 }
4649
4651 template<isa<x86> Arch>
4652 requires(!(Arch.has(x86_feature::avx512f) &&
4653 Arch.has(x86_feature::avx512bw) &&
4654 Arch.has(x86_feature::avx512vbmi2)) &&
4655 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4656 native_nodiscard consteval simd<std::uint8_t, 64, Arch> maskz_vpexpandb(
4657 predicate<64, Arch> mask,
4658 simd<std::uint8_t, 64, Arch> value) noexcept {
4659 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint8_t, 64, Arch>{}, mask.to_bitset(), value);
4660 }
4661
4663 template<isa<x86> Arch, class T>
4664 requires(!(Arch.has(x86_feature::avx512f) &&
4665 Arch.has(x86_feature::avx512bw) &&
4666 Arch.has(x86_feature::avx512vbmi2)) &&
4667 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>) &&
4668 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4669 native_nodiscard consteval simd<std::uint8_t, 64, Arch> mask_vpexpandb(
4670 simd<std::uint8_t, 64, Arch> source,
4671 predicate<64, Arch> mask,
4672 T * memory) noexcept {
4673 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
4674 }
4675
4677 template<isa<x86> Arch, class T>
4678 requires(!(Arch.has(x86_feature::avx512f) &&
4679 Arch.has(x86_feature::avx512bw) &&
4680 Arch.has(x86_feature::avx512vbmi2)) &&
4681 (std::same_as<T, std::uint8_t> || std::same_as<T, std::uint8_t const>) &&
4682 requires { sizeof(simd<std::uint8_t, 64, Arch>); })
4683 native_nodiscard consteval simd<std::uint8_t, 64, Arch> maskz_vpexpandb(
4684 predicate<64, Arch> mask,
4685 T * memory) noexcept {
4686 return detail::x86_vbmi2_constant::expand_load(simd<std::uint8_t, 64, Arch>{}, mask.to_bitset(), memory);
4687 }
4688
4690 template<isa<x86> Arch>
4691 requires(!(Arch.has(x86_feature::avx512f) &&
4692 Arch.has(x86_feature::avx512bw) &&
4693 Arch.has(x86_feature::avx512vbmi2)) &&
4694 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4695 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpcompressw(
4696 simd<std::uint16_t, 32, Arch> source,
4697 predicate<32, Arch> mask,
4698 simd<std::uint16_t, 32, Arch> value) noexcept {
4699 return detail::x86_vbmi2_constant::compact<false>(source, mask.to_bitset(), value);
4700 }
4701
4703 template<isa<x86> Arch>
4704 requires(!(Arch.has(x86_feature::avx512f) &&
4705 Arch.has(x86_feature::avx512bw) &&
4706 Arch.has(x86_feature::avx512vbmi2)) &&
4707 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4708 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpcompressw(
4709 predicate<32, Arch> mask,
4710 simd<std::uint16_t, 32, Arch> value) noexcept {
4711 return detail::x86_vbmi2_constant::compact<false>(simd<std::uint16_t, 32, Arch>{}, mask.to_bitset(), value);
4712 }
4713
4715 template<isa<x86> Arch>
4716 requires(!(Arch.has(x86_feature::avx512f) &&
4717 Arch.has(x86_feature::avx512bw) &&
4718 Arch.has(x86_feature::avx512vbmi2)) &&
4719 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4720 consteval void mask_vpcompressw(
4721 std::uint16_t * destination,
4722 predicate<32, Arch> mask,
4723 simd<std::uint16_t, 32, Arch> value) noexcept {
4724 detail::x86_vbmi2_constant::compress_store(destination, mask.to_bitset(), value);
4725 }
4726
4728 template<isa<x86> Arch>
4729 requires(!(Arch.has(x86_feature::avx512f) &&
4730 Arch.has(x86_feature::avx512bw) &&
4731 Arch.has(x86_feature::avx512vbmi2)) &&
4732 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4733 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpexpandw(
4734 simd<std::uint16_t, 32, Arch> source,
4735 predicate<32, Arch> mask,
4736 simd<std::uint16_t, 32, Arch> value) noexcept {
4737 return detail::x86_vbmi2_constant::compact<true>(source, mask.to_bitset(), value);
4738 }
4739
4741 template<isa<x86> Arch>
4742 requires(!(Arch.has(x86_feature::avx512f) &&
4743 Arch.has(x86_feature::avx512bw) &&
4744 Arch.has(x86_feature::avx512vbmi2)) &&
4745 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4746 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpexpandw(
4747 predicate<32, Arch> mask,
4748 simd<std::uint16_t, 32, Arch> value) noexcept {
4749 return detail::x86_vbmi2_constant::compact<true>(simd<std::uint16_t, 32, Arch>{}, mask.to_bitset(), value);
4750 }
4751
4753 template<isa<x86> Arch, class T>
4754 requires(!(Arch.has(x86_feature::avx512f) &&
4755 Arch.has(x86_feature::avx512bw) &&
4756 Arch.has(x86_feature::avx512vbmi2)) &&
4757 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>) &&
4758 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4759 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpexpandw(
4760 simd<std::uint16_t, 32, Arch> source,
4761 predicate<32, Arch> mask,
4762 T * memory) noexcept {
4763 return detail::x86_vbmi2_constant::expand_load(source, mask.to_bitset(), memory);
4764 }
4765
4767 template<isa<x86> Arch, class T>
4768 requires(!(Arch.has(x86_feature::avx512f) &&
4769 Arch.has(x86_feature::avx512bw) &&
4770 Arch.has(x86_feature::avx512vbmi2)) &&
4771 (std::same_as<T, std::uint16_t> || std::same_as<T, std::uint16_t const>) &&
4772 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4773 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpexpandw(
4774 predicate<32, Arch> mask,
4775 T * memory) noexcept {
4776 return detail::x86_vbmi2_constant::expand_load(simd<std::uint16_t, 32, Arch>{}, mask.to_bitset(), memory);
4777 }
4778
4780 template<isa<x86> Arch, unsigned Imm8>
4781 requires(!(Arch.has(x86_feature::avx512f) &&
4782 Arch.has(x86_feature::avx512bw) &&
4783 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4784 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4785 native_nodiscard consteval simd<std::uint16_t, 32, Arch> vpshldw(
4786 simd<std::uint16_t, 32, Arch> a,
4787 simd<std::uint16_t, 32, Arch> b) noexcept {
4788 return detail::x86_vbmi2_constant::shift<false>(
4789 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
4790 }
4791
4793 template<isa<x86> Arch, unsigned Imm8>
4794 requires(!(Arch.has(x86_feature::avx512f) &&
4795 Arch.has(x86_feature::avx512bw) &&
4796 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4797 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4798 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpshldw(
4799 simd<std::uint16_t, 32, Arch> source,
4800 predicate<32, Arch> mask,
4801 simd<std::uint16_t, 32, Arch> a,
4802 simd<std::uint16_t, 32, Arch> b) noexcept {
4803 return detail::x86_vbmi2_constant::shift<false>(
4804 a, b, Imm8, source, mask.to_bitset());
4805 }
4806
4808 template<isa<x86> Arch, unsigned Imm8>
4809 requires(!(Arch.has(x86_feature::avx512f) &&
4810 Arch.has(x86_feature::avx512bw) &&
4811 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4812 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4813 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpshldw(
4814 predicate<32, Arch> mask,
4815 simd<std::uint16_t, 32, Arch> a,
4816 simd<std::uint16_t, 32, Arch> b) noexcept {
4817 return detail::x86_vbmi2_constant::shift<false>(
4818 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
4819 }
4820
4822 template<isa<x86> Arch>
4823 requires(!(Arch.has(x86_feature::avx512f) &&
4824 Arch.has(x86_feature::avx512bw) &&
4825 Arch.has(x86_feature::avx512vbmi2)) &&
4826 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4827 native_nodiscard consteval simd<std::uint16_t, 32, Arch> vpshldvw(
4828 simd<std::uint16_t, 32, Arch> a,
4829 simd<std::uint16_t, 32, Arch> b,
4830 simd<std::uint16_t, 32, Arch> counts) noexcept {
4831 return detail::x86_vbmi2_constant::shift<false>(
4832 a, b, counts, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
4833 }
4834
4836 template<isa<x86> Arch>
4837 requires(!(Arch.has(x86_feature::avx512f) &&
4838 Arch.has(x86_feature::avx512bw) &&
4839 Arch.has(x86_feature::avx512vbmi2)) &&
4840 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4841 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpshldvw(
4842 simd<std::uint16_t, 32, Arch> a,
4843 predicate<32, Arch> mask,
4844 simd<std::uint16_t, 32, Arch> b,
4845 simd<std::uint16_t, 32, Arch> counts) noexcept {
4846 return detail::x86_vbmi2_constant::shift<false>(
4847 a, b, counts, a, mask.to_bitset());
4848 }
4849
4851 template<isa<x86> Arch>
4852 requires(!(Arch.has(x86_feature::avx512f) &&
4853 Arch.has(x86_feature::avx512bw) &&
4854 Arch.has(x86_feature::avx512vbmi2)) &&
4855 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4856 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpshldvw(
4857 predicate<32, Arch> mask,
4858 simd<std::uint16_t, 32, Arch> a,
4859 simd<std::uint16_t, 32, Arch> b,
4860 simd<std::uint16_t, 32, Arch> counts) noexcept {
4861 return detail::x86_vbmi2_constant::shift<false>(
4862 a, b, counts, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
4863 }
4864
4866 template<isa<x86> Arch, unsigned Imm8>
4867 requires(!(Arch.has(x86_feature::avx512f) &&
4868 Arch.has(x86_feature::avx512bw) &&
4869 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4870 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4871 native_nodiscard consteval simd<std::uint16_t, 32, Arch> vpshrdw(
4872 simd<std::uint16_t, 32, Arch> a,
4873 simd<std::uint16_t, 32, Arch> b) noexcept {
4874 return detail::x86_vbmi2_constant::shift<true>(
4875 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
4876 }
4877
4879 template<isa<x86> Arch, unsigned Imm8>
4880 requires(!(Arch.has(x86_feature::avx512f) &&
4881 Arch.has(x86_feature::avx512bw) &&
4882 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4883 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4884 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpshrdw(
4885 simd<std::uint16_t, 32, Arch> source,
4886 predicate<32, Arch> mask,
4887 simd<std::uint16_t, 32, Arch> a,
4888 simd<std::uint16_t, 32, Arch> b) noexcept {
4889 return detail::x86_vbmi2_constant::shift<true>(
4890 a, b, Imm8, source, mask.to_bitset());
4891 }
4892
4894 template<isa<x86> Arch, unsigned Imm8>
4895 requires(!(Arch.has(x86_feature::avx512f) &&
4896 Arch.has(x86_feature::avx512bw) &&
4897 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4898 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4899 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpshrdw(
4900 predicate<32, Arch> mask,
4901 simd<std::uint16_t, 32, Arch> a,
4902 simd<std::uint16_t, 32, Arch> b) noexcept {
4903 return detail::x86_vbmi2_constant::shift<true>(
4904 a, b, Imm8, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
4905 }
4906
4908 template<isa<x86> Arch>
4909 requires(!(Arch.has(x86_feature::avx512f) &&
4910 Arch.has(x86_feature::avx512bw) &&
4911 Arch.has(x86_feature::avx512vbmi2)) &&
4912 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4913 native_nodiscard consteval simd<std::uint16_t, 32, Arch> vpshrdvw(
4914 simd<std::uint16_t, 32, Arch> a,
4915 simd<std::uint16_t, 32, Arch> b,
4916 simd<std::uint16_t, 32, Arch> counts) noexcept {
4917 return detail::x86_vbmi2_constant::shift<true>(
4918 a, b, counts, simd<std::uint16_t, 32, Arch>{}, ~std::uint64_t{0});
4919 }
4920
4922 template<isa<x86> Arch>
4923 requires(!(Arch.has(x86_feature::avx512f) &&
4924 Arch.has(x86_feature::avx512bw) &&
4925 Arch.has(x86_feature::avx512vbmi2)) &&
4926 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4927 native_nodiscard consteval simd<std::uint16_t, 32, Arch> mask_vpshrdvw(
4928 simd<std::uint16_t, 32, Arch> a,
4929 predicate<32, Arch> mask,
4930 simd<std::uint16_t, 32, Arch> b,
4931 simd<std::uint16_t, 32, Arch> counts) noexcept {
4932 return detail::x86_vbmi2_constant::shift<true>(
4933 a, b, counts, a, mask.to_bitset());
4934 }
4935
4937 template<isa<x86> Arch>
4938 requires(!(Arch.has(x86_feature::avx512f) &&
4939 Arch.has(x86_feature::avx512bw) &&
4940 Arch.has(x86_feature::avx512vbmi2)) &&
4941 requires { sizeof(simd<std::uint16_t, 32, Arch>); })
4942 native_nodiscard consteval simd<std::uint16_t, 32, Arch> maskz_vpshrdvw(
4943 predicate<32, Arch> mask,
4944 simd<std::uint16_t, 32, Arch> a,
4945 simd<std::uint16_t, 32, Arch> b,
4946 simd<std::uint16_t, 32, Arch> counts) noexcept {
4947 return detail::x86_vbmi2_constant::shift<true>(
4948 a, b, counts, simd<std::uint16_t, 32, Arch>{}, mask.to_bitset());
4949 }
4950
4952 template<isa<x86> Arch, unsigned Imm8>
4953 requires(!(Arch.has(x86_feature::avx512f) &&
4954 Arch.has(x86_feature::avx512bw) &&
4955 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4956 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
4957 native_nodiscard consteval simd<std::uint32_t, 16, Arch> vpshldd(
4958 simd<std::uint32_t, 16, Arch> a,
4959 simd<std::uint32_t, 16, Arch> b) noexcept {
4960 return detail::x86_vbmi2_constant::shift<false>(
4961 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
4962 }
4963
4965 template<isa<x86> Arch, unsigned Imm8>
4966 requires(!(Arch.has(x86_feature::avx512f) &&
4967 Arch.has(x86_feature::avx512bw) &&
4968 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4969 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
4970 native_nodiscard consteval simd<std::uint32_t, 16, Arch> mask_vpshldd(
4971 simd<std::uint32_t, 16, Arch> source,
4972 predicate<16, Arch> mask,
4973 simd<std::uint32_t, 16, Arch> a,
4974 simd<std::uint32_t, 16, Arch> b) noexcept {
4975 return detail::x86_vbmi2_constant::shift<false>(
4976 a, b, Imm8, source, mask.to_bitset());
4977 }
4978
4980 template<isa<x86> Arch, unsigned Imm8>
4981 requires(!(Arch.has(x86_feature::avx512f) &&
4982 Arch.has(x86_feature::avx512bw) &&
4983 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
4984 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
4985 native_nodiscard consteval simd<std::uint32_t, 16, Arch> maskz_vpshldd(
4986 predicate<16, Arch> mask,
4987 simd<std::uint32_t, 16, Arch> a,
4988 simd<std::uint32_t, 16, Arch> b) noexcept {
4989 return detail::x86_vbmi2_constant::shift<false>(
4990 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
4991 }
4992
4994 template<isa<x86> Arch>
4995 requires(!(Arch.has(x86_feature::avx512f) &&
4996 Arch.has(x86_feature::avx512bw) &&
4997 Arch.has(x86_feature::avx512vbmi2)) &&
4998 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
4999 native_nodiscard consteval simd<std::uint32_t, 16, Arch> vpshldvd(
5000 simd<std::uint32_t, 16, Arch> a,
5001 simd<std::uint32_t, 16, Arch> b,
5002 simd<std::uint32_t, 16, Arch> counts) noexcept {
5003 return detail::x86_vbmi2_constant::shift<false>(
5004 a, b, counts, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
5005 }
5006
5008 template<isa<x86> Arch>
5009 requires(!(Arch.has(x86_feature::avx512f) &&
5010 Arch.has(x86_feature::avx512bw) &&
5011 Arch.has(x86_feature::avx512vbmi2)) &&
5012 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5013 native_nodiscard consteval simd<std::uint32_t, 16, Arch> mask_vpshldvd(
5014 simd<std::uint32_t, 16, Arch> a,
5015 predicate<16, Arch> mask,
5016 simd<std::uint32_t, 16, Arch> b,
5017 simd<std::uint32_t, 16, Arch> counts) noexcept {
5018 return detail::x86_vbmi2_constant::shift<false>(
5019 a, b, counts, a, mask.to_bitset());
5020 }
5021
5023 template<isa<x86> Arch>
5024 requires(!(Arch.has(x86_feature::avx512f) &&
5025 Arch.has(x86_feature::avx512bw) &&
5026 Arch.has(x86_feature::avx512vbmi2)) &&
5027 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5028 native_nodiscard consteval simd<std::uint32_t, 16, Arch> maskz_vpshldvd(
5029 predicate<16, Arch> mask,
5030 simd<std::uint32_t, 16, Arch> a,
5031 simd<std::uint32_t, 16, Arch> b,
5032 simd<std::uint32_t, 16, Arch> counts) noexcept {
5033 return detail::x86_vbmi2_constant::shift<false>(
5034 a, b, counts, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
5035 }
5036
5038 template<isa<x86> Arch, unsigned Imm8>
5039 requires(!(Arch.has(x86_feature::avx512f) &&
5040 Arch.has(x86_feature::avx512bw) &&
5041 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5042 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5043 native_nodiscard consteval simd<std::uint32_t, 16, Arch> vpshrdd(
5044 simd<std::uint32_t, 16, Arch> a,
5045 simd<std::uint32_t, 16, Arch> b) noexcept {
5046 return detail::x86_vbmi2_constant::shift<true>(
5047 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
5048 }
5049
5051 template<isa<x86> Arch, unsigned Imm8>
5052 requires(!(Arch.has(x86_feature::avx512f) &&
5053 Arch.has(x86_feature::avx512bw) &&
5054 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5055 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5056 native_nodiscard consteval simd<std::uint32_t, 16, Arch> mask_vpshrdd(
5057 simd<std::uint32_t, 16, Arch> source,
5058 predicate<16, Arch> mask,
5059 simd<std::uint32_t, 16, Arch> a,
5060 simd<std::uint32_t, 16, Arch> b) noexcept {
5061 return detail::x86_vbmi2_constant::shift<true>(
5062 a, b, Imm8, source, mask.to_bitset());
5063 }
5064
5066 template<isa<x86> Arch, unsigned Imm8>
5067 requires(!(Arch.has(x86_feature::avx512f) &&
5068 Arch.has(x86_feature::avx512bw) &&
5069 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5070 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5071 native_nodiscard consteval simd<std::uint32_t, 16, Arch> maskz_vpshrdd(
5072 predicate<16, Arch> mask,
5073 simd<std::uint32_t, 16, Arch> a,
5074 simd<std::uint32_t, 16, Arch> b) noexcept {
5075 return detail::x86_vbmi2_constant::shift<true>(
5076 a, b, Imm8, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
5077 }
5078
5080 template<isa<x86> Arch>
5081 requires(!(Arch.has(x86_feature::avx512f) &&
5082 Arch.has(x86_feature::avx512bw) &&
5083 Arch.has(x86_feature::avx512vbmi2)) &&
5084 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5085 native_nodiscard consteval simd<std::uint32_t, 16, Arch> vpshrdvd(
5086 simd<std::uint32_t, 16, Arch> a,
5087 simd<std::uint32_t, 16, Arch> b,
5088 simd<std::uint32_t, 16, Arch> counts) noexcept {
5089 return detail::x86_vbmi2_constant::shift<true>(
5090 a, b, counts, simd<std::uint32_t, 16, Arch>{}, ~std::uint64_t{0});
5091 }
5092
5094 template<isa<x86> Arch>
5095 requires(!(Arch.has(x86_feature::avx512f) &&
5096 Arch.has(x86_feature::avx512bw) &&
5097 Arch.has(x86_feature::avx512vbmi2)) &&
5098 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5099 native_nodiscard consteval simd<std::uint32_t, 16, Arch> mask_vpshrdvd(
5100 simd<std::uint32_t, 16, Arch> a,
5101 predicate<16, Arch> mask,
5102 simd<std::uint32_t, 16, Arch> b,
5103 simd<std::uint32_t, 16, Arch> counts) noexcept {
5104 return detail::x86_vbmi2_constant::shift<true>(
5105 a, b, counts, a, mask.to_bitset());
5106 }
5107
5109 template<isa<x86> Arch>
5110 requires(!(Arch.has(x86_feature::avx512f) &&
5111 Arch.has(x86_feature::avx512bw) &&
5112 Arch.has(x86_feature::avx512vbmi2)) &&
5113 requires { sizeof(simd<std::uint32_t, 16, Arch>); })
5114 native_nodiscard consteval simd<std::uint32_t, 16, Arch> maskz_vpshrdvd(
5115 predicate<16, Arch> mask,
5116 simd<std::uint32_t, 16, Arch> a,
5117 simd<std::uint32_t, 16, Arch> b,
5118 simd<std::uint32_t, 16, Arch> counts) noexcept {
5119 return detail::x86_vbmi2_constant::shift<true>(
5120 a, b, counts, simd<std::uint32_t, 16, Arch>{}, mask.to_bitset());
5121 }
5122
5124 template<isa<x86> Arch, unsigned Imm8>
5125 requires(!(Arch.has(x86_feature::avx512f) &&
5126 Arch.has(x86_feature::avx512bw) &&
5127 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5128 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5129 native_nodiscard consteval simd<std::uint64_t, 8, Arch> vpshldq(
5130 simd<std::uint64_t, 8, Arch> a,
5131 simd<std::uint64_t, 8, Arch> b) noexcept {
5132 return detail::x86_vbmi2_constant::shift<false>(
5133 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
5134 }
5135
5137 template<isa<x86> Arch, unsigned Imm8>
5138 requires(!(Arch.has(x86_feature::avx512f) &&
5139 Arch.has(x86_feature::avx512bw) &&
5140 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5141 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5142 native_nodiscard consteval simd<std::uint64_t, 8, Arch> mask_vpshldq(
5143 simd<std::uint64_t, 8, Arch> source,
5144 predicate<8, Arch> mask,
5145 simd<std::uint64_t, 8, Arch> a,
5146 simd<std::uint64_t, 8, Arch> b) noexcept {
5147 return detail::x86_vbmi2_constant::shift<false>(
5148 a, b, Imm8, source, mask.to_bitset());
5149 }
5150
5152 template<isa<x86> Arch, unsigned Imm8>
5153 requires(!(Arch.has(x86_feature::avx512f) &&
5154 Arch.has(x86_feature::avx512bw) &&
5155 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5156 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5157 native_nodiscard consteval simd<std::uint64_t, 8, Arch> maskz_vpshldq(
5158 predicate<8, Arch> mask,
5159 simd<std::uint64_t, 8, Arch> a,
5160 simd<std::uint64_t, 8, Arch> b) noexcept {
5161 return detail::x86_vbmi2_constant::shift<false>(
5162 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
5163 }
5164
5166 template<isa<x86> Arch>
5167 requires(!(Arch.has(x86_feature::avx512f) &&
5168 Arch.has(x86_feature::avx512bw) &&
5169 Arch.has(x86_feature::avx512vbmi2)) &&
5170 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5171 native_nodiscard consteval simd<std::uint64_t, 8, Arch> vpshldvq(
5172 simd<std::uint64_t, 8, Arch> a,
5173 simd<std::uint64_t, 8, Arch> b,
5174 simd<std::uint64_t, 8, Arch> counts) noexcept {
5175 return detail::x86_vbmi2_constant::shift<false>(
5176 a, b, counts, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
5177 }
5178
5180 template<isa<x86> Arch>
5181 requires(!(Arch.has(x86_feature::avx512f) &&
5182 Arch.has(x86_feature::avx512bw) &&
5183 Arch.has(x86_feature::avx512vbmi2)) &&
5184 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5185 native_nodiscard consteval simd<std::uint64_t, 8, Arch> mask_vpshldvq(
5186 simd<std::uint64_t, 8, Arch> a,
5187 predicate<8, Arch> mask,
5188 simd<std::uint64_t, 8, Arch> b,
5189 simd<std::uint64_t, 8, Arch> counts) noexcept {
5190 return detail::x86_vbmi2_constant::shift<false>(
5191 a, b, counts, a, mask.to_bitset());
5192 }
5193
5195 template<isa<x86> Arch>
5196 requires(!(Arch.has(x86_feature::avx512f) &&
5197 Arch.has(x86_feature::avx512bw) &&
5198 Arch.has(x86_feature::avx512vbmi2)) &&
5199 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5200 native_nodiscard consteval simd<std::uint64_t, 8, Arch> maskz_vpshldvq(
5201 predicate<8, Arch> mask,
5202 simd<std::uint64_t, 8, Arch> a,
5203 simd<std::uint64_t, 8, Arch> b,
5204 simd<std::uint64_t, 8, Arch> counts) noexcept {
5205 return detail::x86_vbmi2_constant::shift<false>(
5206 a, b, counts, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
5207 }
5208
5210 template<isa<x86> Arch, unsigned Imm8>
5211 requires(!(Arch.has(x86_feature::avx512f) &&
5212 Arch.has(x86_feature::avx512bw) &&
5213 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5214 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5215 native_nodiscard consteval simd<std::uint64_t, 8, Arch> vpshrdq(
5216 simd<std::uint64_t, 8, Arch> a,
5217 simd<std::uint64_t, 8, Arch> b) noexcept {
5218 return detail::x86_vbmi2_constant::shift<true>(
5219 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
5220 }
5221
5223 template<isa<x86> Arch, unsigned Imm8>
5224 requires(!(Arch.has(x86_feature::avx512f) &&
5225 Arch.has(x86_feature::avx512bw) &&
5226 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5227 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5228 native_nodiscard consteval simd<std::uint64_t, 8, Arch> mask_vpshrdq(
5229 simd<std::uint64_t, 8, Arch> source,
5230 predicate<8, Arch> mask,
5231 simd<std::uint64_t, 8, Arch> a,
5232 simd<std::uint64_t, 8, Arch> b) noexcept {
5233 return detail::x86_vbmi2_constant::shift<true>(
5234 a, b, Imm8, source, mask.to_bitset());
5235 }
5236
5238 template<isa<x86> Arch, unsigned Imm8>
5239 requires(!(Arch.has(x86_feature::avx512f) &&
5240 Arch.has(x86_feature::avx512bw) &&
5241 Arch.has(x86_feature::avx512vbmi2)) && Imm8 <= 255 &&
5242 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5243 native_nodiscard consteval simd<std::uint64_t, 8, Arch> maskz_vpshrdq(
5244 predicate<8, Arch> mask,
5245 simd<std::uint64_t, 8, Arch> a,
5246 simd<std::uint64_t, 8, Arch> b) noexcept {
5247 return detail::x86_vbmi2_constant::shift<true>(
5248 a, b, Imm8, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
5249 }
5250
5252 template<isa<x86> Arch>
5253 requires(!(Arch.has(x86_feature::avx512f) &&
5254 Arch.has(x86_feature::avx512bw) &&
5255 Arch.has(x86_feature::avx512vbmi2)) &&
5256 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5257 native_nodiscard consteval simd<std::uint64_t, 8, Arch> vpshrdvq(
5258 simd<std::uint64_t, 8, Arch> a,
5259 simd<std::uint64_t, 8, Arch> b,
5260 simd<std::uint64_t, 8, Arch> counts) noexcept {
5261 return detail::x86_vbmi2_constant::shift<true>(
5262 a, b, counts, simd<std::uint64_t, 8, Arch>{}, ~std::uint64_t{0});
5263 }
5264
5266 template<isa<x86> Arch>
5267 requires(!(Arch.has(x86_feature::avx512f) &&
5268 Arch.has(x86_feature::avx512bw) &&
5269 Arch.has(x86_feature::avx512vbmi2)) &&
5270 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5271 native_nodiscard consteval simd<std::uint64_t, 8, Arch> mask_vpshrdvq(
5272 simd<std::uint64_t, 8, Arch> a,
5273 predicate<8, Arch> mask,
5274 simd<std::uint64_t, 8, Arch> b,
5275 simd<std::uint64_t, 8, Arch> counts) noexcept {
5276 return detail::x86_vbmi2_constant::shift<true>(
5277 a, b, counts, a, mask.to_bitset());
5278 }
5279
5281 template<isa<x86> Arch>
5282 requires(!(Arch.has(x86_feature::avx512f) &&
5283 Arch.has(x86_feature::avx512bw) &&
5284 Arch.has(x86_feature::avx512vbmi2)) &&
5285 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
5286 native_nodiscard consteval simd<std::uint64_t, 8, Arch> maskz_vpshrdvq(
5287 predicate<8, Arch> mask,
5288 simd<std::uint64_t, 8, Arch> a,
5289 simd<std::uint64_t, 8, Arch> b,
5290 simd<std::uint64_t, 8, Arch> counts) noexcept {
5291 return detail::x86_vbmi2_constant::shift<true>(
5292 a, b, counts, simd<std::uint64_t, 8, Arch>{}, mask.to_bitset());
5293 }
5294
5296 template<isa<x86> Arch, class... Args>
5297 void mask_vpcompressb(Args...) = delete;
5298
5300 template<isa<x86> Arch, class... Args>
5301 void maskz_vpcompressb(Args...) = delete;
5302
5304 template<isa<x86> Arch, class... Args>
5305 void mask_vpexpandb(Args...) = delete;
5306
5308 template<isa<x86> Arch, class... Args>
5309 void maskz_vpexpandb(Args...) = delete;
5310
5312 template<isa<x86> Arch, class... Args>
5313 void mask_vpcompressw(Args...) = delete;
5314
5316 template<isa<x86> Arch, class... Args>
5317 void maskz_vpcompressw(Args...) = delete;
5318
5320 template<isa<x86> Arch, class... Args>
5321 void mask_vpexpandw(Args...) = delete;
5322
5324 template<isa<x86> Arch, class... Args>
5325 void maskz_vpexpandw(Args...) = delete;
5326
5328 template<isa<x86> Arch, unsigned Imm8, class... Args>
5329 void vpshldw(Args...) = delete;
5330
5332 template<isa<x86> Arch, unsigned Imm8, class... Args>
5333 void mask_vpshldw(Args...) = delete;
5334
5336 template<isa<x86> Arch, unsigned Imm8, class... Args>
5337 void maskz_vpshldw(Args...) = delete;
5338
5340 template<isa<x86> Arch, class... Args>
5341 void vpshldvw(Args...) = delete;
5342
5344 template<isa<x86> Arch, class... Args>
5345 void mask_vpshldvw(Args...) = delete;
5346
5348 template<isa<x86> Arch, class... Args>
5349 void maskz_vpshldvw(Args...) = delete;
5350
5352 template<isa<x86> Arch, unsigned Imm8, class... Args>
5353 void vpshrdw(Args...) = delete;
5354
5356 template<isa<x86> Arch, unsigned Imm8, class... Args>
5357 void mask_vpshrdw(Args...) = delete;
5358
5360 template<isa<x86> Arch, unsigned Imm8, class... Args>
5361 void maskz_vpshrdw(Args...) = delete;
5362
5364 template<isa<x86> Arch, class... Args>
5365 void vpshrdvw(Args...) = delete;
5366
5368 template<isa<x86> Arch, class... Args>
5369 void mask_vpshrdvw(Args...) = delete;
5370
5372 template<isa<x86> Arch, class... Args>
5373 void maskz_vpshrdvw(Args...) = delete;
5374
5376 template<isa<x86> Arch, unsigned Imm8, class... Args>
5377 void vpshldd(Args...) = delete;
5378
5380 template<isa<x86> Arch, unsigned Imm8, class... Args>
5381 void mask_vpshldd(Args...) = delete;
5382
5384 template<isa<x86> Arch, unsigned Imm8, class... Args>
5385 void maskz_vpshldd(Args...) = delete;
5386
5388 template<isa<x86> Arch, class... Args>
5389 void vpshldvd(Args...) = delete;
5390
5392 template<isa<x86> Arch, class... Args>
5393 void mask_vpshldvd(Args...) = delete;
5394
5396 template<isa<x86> Arch, class... Args>
5397 void maskz_vpshldvd(Args...) = delete;
5398
5400 template<isa<x86> Arch, unsigned Imm8, class... Args>
5401 void vpshrdd(Args...) = delete;
5402
5404 template<isa<x86> Arch, unsigned Imm8, class... Args>
5405 void mask_vpshrdd(Args...) = delete;
5406
5408 template<isa<x86> Arch, unsigned Imm8, class... Args>
5409 void maskz_vpshrdd(Args...) = delete;
5410
5412 template<isa<x86> Arch, class... Args>
5413 void vpshrdvd(Args...) = delete;
5414
5416 template<isa<x86> Arch, class... Args>
5417 void mask_vpshrdvd(Args...) = delete;
5418
5420 template<isa<x86> Arch, class... Args>
5421 void maskz_vpshrdvd(Args...) = delete;
5422
5424 template<isa<x86> Arch, unsigned Imm8, class... Args>
5425 void vpshldq(Args...) = delete;
5426
5428 template<isa<x86> Arch, unsigned Imm8, class... Args>
5429 void mask_vpshldq(Args...) = delete;
5430
5432 template<isa<x86> Arch, unsigned Imm8, class... Args>
5433 void maskz_vpshldq(Args...) = delete;
5434
5436 template<isa<x86> Arch, class... Args>
5437 void vpshldvq(Args...) = delete;
5438
5440 template<isa<x86> Arch, class... Args>
5441 void mask_vpshldvq(Args...) = delete;
5442
5444 template<isa<x86> Arch, class... Args>
5445 void maskz_vpshldvq(Args...) = delete;
5446
5448 template<isa<x86> Arch, unsigned Imm8, class... Args>
5449 void vpshrdq(Args...) = delete;
5450
5452 template<isa<x86> Arch, unsigned Imm8, class... Args>
5453 void mask_vpshrdq(Args...) = delete;
5454
5456 template<isa<x86> Arch, unsigned Imm8, class... Args>
5457 void maskz_vpshrdq(Args...) = delete;
5458
5460 template<isa<x86> Arch, class... Args>
5461 void vpshrdvq(Args...) = delete;
5462
5464 template<isa<x86> Arch, class... Args>
5465 void mask_vpshrdvq(Args...) = delete;
5466
5468 template<isa<x86> Arch, class... Args>
5469 void maskz_vpshrdvq(Args...) = delete;
5470
5472}
5473#endif
native_inline
#define native_inline
inline [[always_inline]]
Definition attributes.h:212
native_nodiscard
#define native_nodiscard
C++17 [[nodiscard]].
Definition attributes.h:189
native_const
#define native_const
[[const]] is not const
Definition attributes.h:108
native_pure
#define native_pure
[[pure]]
Definition attributes.h:126
native_target
#define native_target(x)
this indicates a required feature set for the current multiversioned function.
Definition attributes.h:476
native::mask
typename mask_traits< std::remove_cvref_t< T > >::type mask
Definition mask_traits.h:22
native::maskz_vpshrdw
constexpr simd< std::uint16_t, 8, Arch > maskz_vpshrdw(predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b) noexcept
Shift concatenated lanes right using Imm8. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:478
native::maskz_vpshldvd
constexpr simd< std::uint32_t, 4, Arch > maskz_vpshldvd(predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:670
native::mask_vpshldd
constexpr simd< std::uint32_t, 4, Arch > mask_vpshldd(simd< std::uint32_t, 4, Arch > source, predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Shift concatenated lanes left using Imm8. Inactive lanes retain source.
Definition native.x86.vbmi2.ccm:584
native::vpshldvw
constexpr simd< std::uint16_t, 8, Arch > vpshldvw(simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts.
Definition native.x86.vbmi2.ccm:371
native::mask_vpshldvd
constexpr simd< std::uint32_t, 4, Arch > mask_vpshldvd(simd< std::uint32_t, 4, Arch > a, predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts. Inactive lanes retain a.
Definition native.x86.vbmi2.ccm:648
native::mask_vpcompressw
constexpr simd< std::uint16_t, 8, Arch > mask_vpcompressw(simd< std::uint16_t, 8, Arch > source, predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > value) noexcept
Pack selected lanes in order into the low result lanes. Inactive result lanes retain source.
Definition native.x86.vbmi2.ccm:170
native::maskz_vpshrdvq
constexpr simd< std::uint64_t, 2, Arch > maskz_vpshrdvq(predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:1054
native::maskz_vpshldvq
constexpr simd< std::uint64_t, 2, Arch > maskz_vpshldvq(predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:926
native::mask_vpshrdvd
constexpr simd< std::uint32_t, 4, Arch > mask_vpshrdvd(simd< std::uint32_t, 4, Arch > a, predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts. Inactive lanes retain a.
Definition native.x86.vbmi2.ccm:776
native::maskz_vpshrdvw
constexpr simd< std::uint16_t, 8, Arch > maskz_vpshrdvw(predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:542
native::maskz_vpshrdq
constexpr simd< std::uint64_t, 2, Arch > maskz_vpshrdq(predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Shift concatenated lanes right using Imm8. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:990
native::vpshldvd
constexpr simd< std::uint32_t, 4, Arch > vpshldvd(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts.
Definition native.x86.vbmi2.ccm:627
native::maskz_vpshldw
constexpr simd< std::uint16_t, 8, Arch > maskz_vpshldw(predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b) noexcept
Shift concatenated lanes left using Imm8. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:350
native::maskz_vpshrdvd
constexpr simd< std::uint32_t, 4, Arch > maskz_vpshrdvd(predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:798
native::mask_vpshrdq
constexpr simd< std::uint64_t, 2, Arch > mask_vpshrdq(simd< std::uint64_t, 2, Arch > source, predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Shift concatenated lanes right using Imm8. Inactive lanes retain source.
Definition native.x86.vbmi2.ccm:968
native::mask_vpshldvq
constexpr simd< std::uint64_t, 2, Arch > mask_vpshldvq(simd< std::uint64_t, 2, Arch > a, predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts. Inactive lanes retain a.
Definition native.x86.vbmi2.ccm:904
native::mask_vpshrdd
constexpr simd< std::uint32_t, 4, Arch > mask_vpshrdd(simd< std::uint32_t, 4, Arch > source, predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Shift concatenated lanes right using Imm8. Inactive lanes retain source.
Definition native.x86.vbmi2.ccm:712
native::vpshldw
constexpr simd< std::uint16_t, 8, Arch > vpshldw(simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b) noexcept
Shift concatenated lanes left using Imm8.
Definition native.x86.vbmi2.ccm:308
native::mask_vpshrdw
constexpr simd< std::uint16_t, 8, Arch > mask_vpshrdw(simd< std::uint16_t, 8, Arch > source, predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b) noexcept
Shift concatenated lanes right using Imm8. Inactive lanes retain source.
Definition native.x86.vbmi2.ccm:456
native::vpshldd
constexpr simd< std::uint32_t, 4, Arch > vpshldd(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Shift concatenated lanes left using Imm8.
Definition native.x86.vbmi2.ccm:564
native::mask_vpshrdvw
constexpr simd< std::uint16_t, 8, Arch > mask_vpshrdvw(simd< std::uint16_t, 8, Arch > a, predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts. Inactive lanes retain a.
Definition native.x86.vbmi2.ccm:520
native::maskz_vpshldq
constexpr simd< std::uint64_t, 2, Arch > maskz_vpshldq(predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Shift concatenated lanes left using Imm8. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:862
native::maskz_vpcompressw
constexpr simd< std::uint16_t, 8, Arch > maskz_vpcompressw(predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > value) noexcept
Pack selected lanes in order into the low result lanes. Remaining result lanes become zero.
Definition native.x86.vbmi2.ccm:190
native::mask_vpshldw
constexpr simd< std::uint16_t, 8, Arch > mask_vpshldw(simd< std::uint16_t, 8, Arch > source, predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b) noexcept
Shift concatenated lanes left using Imm8. Inactive lanes retain source.
Definition native.x86.vbmi2.ccm:328
native::vpshrdw
constexpr simd< std::uint16_t, 8, Arch > vpshrdw(simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b) noexcept
Shift concatenated lanes right using Imm8.
Definition native.x86.vbmi2.ccm:436
native::mask_vpshldq
constexpr simd< std::uint64_t, 2, Arch > mask_vpshldq(simd< std::uint64_t, 2, Arch > source, predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Shift concatenated lanes left using Imm8. Inactive lanes retain source.
Definition native.x86.vbmi2.ccm:840
native::maskz_vpshrdd
constexpr simd< std::uint32_t, 4, Arch > maskz_vpshrdd(predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Shift concatenated lanes right using Imm8. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:734
native::vpshrdvd
constexpr simd< std::uint32_t, 4, Arch > vpshrdvd(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b, simd< std::uint32_t, 4, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts.
Definition native.x86.vbmi2.ccm:755
native::maskz_vpcompressb
constexpr simd< std::uint8_t, 16, Arch > maskz_vpcompressb(predicate< 16, Arch > mask, simd< std::uint8_t, 16, Arch > value) noexcept
Pack selected lanes in order into the low result lanes. Remaining result lanes become zero.
Definition native.x86.vbmi2.ccm:52
native::vpshrdvq
constexpr simd< std::uint64_t, 2, Arch > vpshrdvq(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts.
Definition native.x86.vbmi2.ccm:1011
native::mask_vpexpandw
constexpr simd< std::uint16_t, 8, Arch > mask_vpexpandw(simd< std::uint16_t, 8, Arch > source, predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > value) noexcept
Expand the packed prefix into selected lanes. Inactive result lanes retain source.
Definition native.x86.vbmi2.ccm:228
native::maskz_vpshldd
constexpr simd< std::uint32_t, 4, Arch > maskz_vpshldd(predicate< 4, Arch > mask, simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Shift concatenated lanes left using Imm8. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:606
native::vpshrdd
constexpr simd< std::uint32_t, 4, Arch > vpshrdd(simd< std::uint32_t, 4, Arch > a, simd< std::uint32_t, 4, Arch > b) noexcept
Shift concatenated lanes right using Imm8.
Definition native.x86.vbmi2.ccm:692
native::maskz_vpshldvw
constexpr simd< std::uint16_t, 8, Arch > maskz_vpshldvw(predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts. Inactive lanes become zero.
Definition native.x86.vbmi2.ccm:414
native::mask_vpshldvw
constexpr simd< std::uint16_t, 8, Arch > mask_vpshldvw(simd< std::uint16_t, 8, Arch > a, predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts. Inactive lanes retain a.
Definition native.x86.vbmi2.ccm:392
native::vpshldq
constexpr simd< std::uint64_t, 2, Arch > vpshldq(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Shift concatenated lanes left using Imm8.
Definition native.x86.vbmi2.ccm:820
native::maskz_vpexpandw
constexpr simd< std::uint16_t, 8, Arch > maskz_vpexpandw(predicate< 8, Arch > mask, simd< std::uint16_t, 8, Arch > value) noexcept
Expand the packed prefix into selected lanes. Remaining result lanes become zero.
Definition native.x86.vbmi2.ccm:248
native::mask_vpexpandb
constexpr simd< std::uint8_t, 16, Arch > mask_vpexpandb(simd< std::uint8_t, 16, Arch > source, predicate< 16, Arch > mask, simd< std::uint8_t, 16, Arch > value) noexcept
Expand the packed prefix into selected lanes. Inactive result lanes retain source.
Definition native.x86.vbmi2.ccm:90
native::vpshldvq
constexpr simd< std::uint64_t, 2, Arch > vpshldvq(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > counts) noexcept
Shift concatenated lanes left using per-lane counts.
Definition native.x86.vbmi2.ccm:883
native::vpshrdq
constexpr simd< std::uint64_t, 2, Arch > vpshrdq(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Shift concatenated lanes right using Imm8.
Definition native.x86.vbmi2.ccm:948
native::mask_vpcompressb
constexpr simd< std::uint8_t, 16, Arch > mask_vpcompressb(simd< std::uint8_t, 16, Arch > source, predicate< 16, Arch > mask, simd< std::uint8_t, 16, Arch > value) noexcept
Pack selected lanes in order into the low result lanes. Inactive result lanes retain source.
Definition native.x86.vbmi2.ccm:32
native::vpshrdvw
constexpr simd< std::uint16_t, 8, Arch > vpshrdvw(simd< std::uint16_t, 8, Arch > a, simd< std::uint16_t, 8, Arch > b, simd< std::uint16_t, 8, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts.
Definition native.x86.vbmi2.ccm:499
native::mask_vpshrdvq
constexpr simd< std::uint64_t, 2, Arch > mask_vpshrdvq(simd< std::uint64_t, 2, Arch > a, predicate< 2, Arch > mask, simd< std::uint64_t, 2, Arch > b, simd< std::uint64_t, 2, Arch > counts) noexcept
Shift concatenated lanes right using per-lane counts. Inactive lanes retain a.
Definition native.x86.vbmi2.ccm:1032
native::maskz_vpexpandb
constexpr simd< std::uint8_t, 16, Arch > maskz_vpexpandb(predicate< 16, Arch > mask, simd< std::uint8_t, 16, Arch > value) noexcept
Expand the packed prefix into selected lanes. Remaining result lanes become zero.
Definition native.x86.vbmi2.ccm:110
native.simd
native.x86.features
native.x86.vbmi2
native
Architecture-tagged vectors, register packs and supporting value types. Native arithmetic follows its...
Definition native.arm.aes.ccm:10
std
Standard-library adaptations documented here for SIMD value types.
native::simd
Omitted architecture arguments use the native.simd provider's baseline.
Definition native.simd.ccm:19