3#include "native/isa_import.h"
4#include "native/x86/vpclmul.h"
5#include "native/x86/integer_constant.h"
10#if NATIVE_HOST_X86 || defined(NATIVE_DOXYGEN)
29 template<isa<x86> Arch,
unsigned Imm8>
requires(Arch.has(x86_feature::pclmul) &&
30 Arch.has(x86_feature::avx) && Imm8 <= 255)
33 if consteval {
return detail::x86_instruction_constant::carryless<Imm8>(a, b); }
40 template<isa<x86> Arch,
unsigned Imm8>
requires(Arch.has(x86_feature::vpclmulqdq) &&
41 Arch.has(x86_feature::avx) && Imm8 <= 255)
44 if consteval {
return detail::x86_instruction_constant::carryless<Imm8>(a, b); }
51 template<isa<x86> Arch,
unsigned Imm8>
requires(Arch.has(x86_feature::vpclmulqdq) &&
52 Arch.has(x86_feature::avx512f) && Imm8 <= 255)
55 if consteval {
return detail::x86_instruction_constant::carryless<Imm8>(a, b); }
62 template<isa<x86> Arch,
unsigned Imm8>
requires(!((Arch.has(x86_feature::pclmul) &&
63 Arch.has(x86_feature::avx))) && Imm8 <= 255 &&
64 requires { sizeof(simd<std::uint64_t, 2, Arch>); })
66 return detail::x86_instruction_constant::carryless<Imm8>(a, b);
70 template<isa<x86> Arch,
unsigned Imm8>
requires(!((Arch.has(x86_feature::vpclmulqdq) &&
71 Arch.has(x86_feature::avx))) && Imm8 <= 255 &&
72 requires { sizeof(simd<std::uint64_t, 4, Arch>); })
74 return detail::x86_instruction_constant::carryless<Imm8>(a, b);
78 template<isa<x86> Arch,
unsigned Imm8>
requires(!((Arch.has(x86_feature::vpclmulqdq) &&
79 Arch.has(x86_feature::avx512f))) && Imm8 <= 255 &&
80 requires { sizeof(simd<std::uint64_t, 8, Arch>); })
82 return detail::x86_instruction_constant::carryless<Imm8>(a, b);
87 template<isa<x86> Arch,
unsigned Imm8,
class... Args>
#define native_inline
inline [[always_inline]]
#define native_nodiscard
C++17 [[nodiscard]].
#define native_const
[[const]] is not const
#define native_target(x)
this indicates a required feature set for the current multiversioned function.
constexpr simd< std::uint64_t, 2, Arch > vpclmulqdq(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Multiply selected halves of one 128-bit lane using PCLMUL and AVX.
Architecture-tagged vectors, register packs and supporting value types. Native arithmetic follows its...
Standard-library adaptations documented here for SIMD value types.
Omitted architecture arguments use the native.simd provider's baseline.