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native 0.0.1
Vectors, masks and wide register packs for C++26
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One complete WebAssembly SIMD128 register with semantic element lanes. More...
#include <simd_family.h>
Public Member Functions | |
| constexpr | simd () noexcept=default |
| Default initialization leaves storage unspecified; braces zero it. | |
| constexpr | simd (T value) noexcept |
| Copy each lane's representation; unused physical bytes are zero. | |
| constexpr | simd (std::array< T, N > const &values) noexcept |
| Copy the array elements in lane order. | |
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template<class... U> requires (sizeof...(U)==N && (std::same_as<U,T> && ...)) | |
| constexpr | simd (U... values) noexcept |
| Construct exactly N lanes from values of the element type. | |
| constexpr native_type | to_native () const noexcept |
| Bridge to the implementation register without numerical conversion. | |
| constexpr native_type | to_native () const noexcept |
| Bridge to the implementation register without numerical conversion. | |
| constexpr native_type | to_native () const noexcept |
| Bridge to the implementation register without numerical conversion. | |
| template<std::size_t Alignment = 1> | |
| constexpr void | store_memory (T *p) const noexcept |
| Write exactly N objects; Alignment is a caller promise. | |
| constexpr void | store (T *p) const noexcept |
| Write exactly N elements in lane order. | |
| constexpr void | storeu (T *p) const noexcept |
| Synonym for store; register alignment is unnecessary. | |
| constexpr void | store_partial (T *p, std::size_t n) const noexcept |
| Write the first n <= N elements; a null pointer is valid for n == 0. | |
| constexpr bits_type | bits () const noexcept |
| Return each half lane as its unchanged unsigned representation. | |
| constexpr bits_type | to_bits () const noexcept |
| Synonym for bits; no floating-point conversion occurs. | |
| constexpr void | store_bits (std::uint16_t *p) const noexcept |
| Write N unsigned half representations without numerical conversion. | |
| constexpr | simd () noexcept=default |
| Initialize every lane to zero. | |
| constexpr | simd (T x) noexcept |
| Broadcast a floating element value to every lane. | |
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template<simd_integer_element U> requires simd_integer_element<T> | |
| constexpr | simd (U input) noexcept |
| Broadcast an integer, retaining its low lane-width bits in every lane. | |
| constexpr | simd (std::array< T, N > const &a) noexcept |
| Copy the array in lane order. | |
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template<class... U> requires (sizeof...(U) == N && ((std::same_as<U, T> && ...) || (simd_integer_element<T> && (simd_integer_element<U> && ...)))) | |
| constexpr | simd (U... x) noexcept |
| Construct N lanes; integer arguments retain their low lane-width bits. | |
| constexpr native_type | to_native () const noexcept |
| Return the implementation register without changing its bits. | |
| constexpr void | store (T *p) const noexcept |
| Store exactly 16 unaligned bytes in lane order. | |
| template<std::size_t Align> | |
| constexpr void | store_memory (T *p) const noexcept |
| Store all lanes; Align is the caller-provided pointer alignment. | |
| constexpr void | store_partial (T *p, std::size_t n) const noexcept |
| Write only the first n lanes; require n <= N. Null is valid when n is zero. | |
| constexpr void | store_bits (word_type *p) const noexcept |
| Store lane representations as corresponding unsigned words. | |
| constexpr bits_type | bits () const noexcept |
| Reinterpret each lane as an unsigned word of the same width. | |
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template<std::size_t I> requires (I < N) | |
| constexpr T | get () const noexcept |
| Extract the compile-time-selected lane as its scalar element type. | |
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template<std::size_t I> requires (I < N) | |
| constexpr simd | replace (T x) const noexcept |
| Replace one compile-time-selected lane and preserve every other lane. | |
| constexpr simd & | operator+= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd & | operator-= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd & | operator*= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd & | operator/= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd & | operator&= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd & | operator|= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd & | operator^= (simd b) noexcept |
| Apply the corresponding lane operation and update this value. | |
| constexpr simd | left (unsigned count) const noexcept |
| WebAssembly shifts reduce the count modulo the lane width. | |
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template<std::size_t K> requires simd_integer_element<T> | |
| constexpr simd | left () const noexcept |
| Shift lanes left by K modulo the lane width. | |
| constexpr simd | right (unsigned count) const noexcept |
| WebAssembly shifts reduce the count modulo the lane width. | |
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template<std::size_t K> requires simd_integer_element<T> | |
| constexpr simd | right () const noexcept |
| Shift lanes right by K modulo the lane width. | |
Static Public Member Functions | |
| static constexpr simd | from_native (native_type value) noexcept |
| Adopt register bits unchanged; unused physical bytes are unspecified. | |
| static constexpr simd | unsafe_from_native (native_type value) noexcept |
| Synonym for from_native; these storage-only shapes do not normalize padding. | |
| static constexpr simd | from_native (native_type value) noexcept |
| Adopt register bits unchanged; unused physical bytes are unspecified. | |
| static constexpr simd | unsafe_from_native (native_type value) noexcept |
| Synonym for from_native; these storage-only shapes do not normalize padding. | |
| static constexpr simd | from_native (native_type value) noexcept |
| Adopt register bits unchanged; unused physical bytes are unspecified. | |
| static constexpr simd | unsafe_from_native (native_type value) noexcept |
| Synonym for from_native; these storage-only shapes do not normalize padding. | |
| template<std::size_t Alignment = 1> | |
| static constexpr simd | load_memory (T const *p) noexcept |
| Read exactly N objects, without requiring register-width alignment. | |
| static constexpr simd | load (T const *p) noexcept |
| Read exactly N elements with their natural alignment. | |
| static constexpr simd | loadu (T const *p) noexcept |
| Synonym for load; register alignment is unnecessary. | |
| static constexpr simd | load_partial (T const *p, std::size_t n, T fill=T{}) noexcept |
| Read n <= N elements and fill the remainder; a null pointer is valid for n == 0. | |
| static constexpr simd | from_bits (bits_type words) noexcept |
| Interpret unsigned words as half representations without conversion. | |
| static constexpr simd | load_bits (std::uint16_t const *p) noexcept |
| Read N unsigned half representations without numerical conversion. | |
| static constexpr simd | from_native (native_type x) noexcept |
| Adopt implementation storage; mask specializations normalize nonzero lanes. | |
| static constexpr simd | unsafe_from_native (native_type x) noexcept |
| Adopt implementation bits; mask callers must supply canonical lanes. | |
| static constexpr simd | load (T const *p) noexcept |
| Load exactly 16 unaligned bytes as N element objects. | |
| template<std::size_t Align> | |
| static constexpr simd | load_memory (T const *p) noexcept |
| Load all lanes; Align is the caller-provided pointer alignment. | |
| static constexpr simd | load_partial (T const *p, std::size_t n, T fill={}) noexcept |
| Read n lanes and fill the rest; require n <= N. Null is valid when n is zero. | |
| static constexpr simd | load_bits (word_type const *p) noexcept |
| Load lane representations from corresponding unsigned words. | |
| static constexpr simd | from_bits (bits_type x) noexcept |
| Adopt unsigned lane representations without numerical conversion. | |
Friends | |
| void | operator+ (simd)=delete |
| Reject unary arithmetic on half instruction storage. | |
| void | operator- (simd)=delete |
| Reject unary arithmetic on half instruction storage. | |
| void | operator~ (simd)=delete |
| Use bits() for explicit bitwise operations on half representations. | |
| void | operator! (simd)=delete |
| Half storage does not define a predicate conversion. | |
| constexpr simd | operator+ (simd a, simd b) noexcept |
| Add lanes; integer results wrap and floating results round to nearest-even. | |
| constexpr simd | operator- (simd a, simd b) noexcept |
| Subtract or negate lanes; integer results wrap and floating signs are preserved. | |
| constexpr simd | operator* (simd a, simd b) noexcept |
| Multiply lanes; integer results wrap and floating results round to nearest-even. | |
| constexpr simd | operator/ (simd a, simd b) noexcept |
| Divide floating lanes with WebAssembly IEEE semantics. | |
| constexpr simd | operator& (simd a, simd b) noexcept |
| Intersect representation bits. | |
| constexpr simd | operator| (simd a, simd b) noexcept |
| Unite representation bits. | |
| constexpr simd | operator^ (simd a, simd b) noexcept |
| Exclusive-or representation bits. | |
| constexpr simd | operator~ (simd a) noexcept |
| Complement every representation bit (or lane truth for masks). | |
| constexpr simd | operator- (simd a) noexcept |
| Subtract or negate lanes; integer results wrap and floating signs are preserved. | |
| constexpr mask_type | operator== (simd a, simd b) noexcept |
| Compare lane equality and return canonical mask lanes. | |
| constexpr mask_type | operator!= (simd a, simd b) noexcept |
| Compare lane inequality and return canonical mask lanes. | |
| constexpr mask_type | operator< (simd a, simd b) noexcept |
| Compare lanes using their signedness; unordered floating lanes are false. | |
| constexpr mask_type | operator<= (simd a, simd b) noexcept |
| Compare lanes using their signedness; unordered floating lanes are false. | |
| constexpr mask_type | operator> (simd a, simd b) noexcept |
| Compare lanes using their signedness; unordered floating lanes are false. | |
| constexpr mask_type | operator>= (simd a, simd b) noexcept |
| Compare lanes using their signedness; unordered floating lanes are false. | |
| constexpr simd | operator<< (simd a, unsigned n) noexcept |
| Shift integer lanes left, reducing the count modulo the lane width. | |
| template<std::size_t K> requires simd_integer_element<T> | |
| constexpr simd | operator<< (simd a, imm_t< K >) |
| Shift integer lanes left, reducing the count modulo the lane width. | |
| constexpr simd | operator>> (simd a, unsigned n) noexcept |
| Shift integer lanes right, extending signed lanes and reducing the count modulo their width. | |
| template<std::size_t K> requires simd_integer_element<T> | |
| constexpr simd | operator>> (simd a, imm_t< K >) |
| Shift integer lanes right, extending signed lanes and reducing the count modulo their width. | |
One complete WebAssembly SIMD128 register with semantic element lanes.
One register of representation-preserving instruction operands. This shape provides storage and transfer operations; arithmetic is supplied by the instruction modules supported by its architecture tag.
Definition at line 962 of file native.simd.ccm.
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Shift integer lanes left, reducing the count modulo the lane width.
Shift every lane left by K bits, discarding high bits. Require K smaller than the lane bit width.
Definition at line 6439 of file simd_family.h.
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Shift integer lanes right, extending signed lanes and reducing the count modulo their width.
Shift every lane right by K; signed lanes extend the sign, unsigned lanes shift in zero. Require K smaller than the lane bit width.
Definition at line 6490 of file simd_family.h.