3#include "native/isa_import.h"
4#include "native/arm/detail/crypto_constant.h"
5#include "native/arm/sha.h"
6#include "native/targets.h"
10#if NATIVE_HOST_NEON || defined(NATIVE_DOXYGEN)
27 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha1))
30 if consteval {
return detail::arm_constant::sha1_rounds<0>(abcd, e, wk); }
32 auto result = detail::arm_sha::sha1c<Arch>(__builtin_bit_cast(uint32x4_t, abcd.to_native()), e, __builtin_bit_cast(uint32x4_t, wk.to_native()));
38 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha1) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
40 return detail::arm_constant::sha1_rounds<0>(abcd, e, wk);
44 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha1))
47 if consteval {
return detail::arm_constant::sha1_rounds<1>(abcd, e, wk); }
49 auto result = detail::arm_sha::sha1p<Arch>(__builtin_bit_cast(uint32x4_t, abcd.to_native()), e, __builtin_bit_cast(uint32x4_t, wk.to_native()));
55 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha1) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
57 return detail::arm_constant::sha1_rounds<1>(abcd, e, wk);
61 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha1))
64 if consteval {
return detail::arm_constant::sha1_rounds<2>(abcd, e, wk); }
66 auto result = detail::arm_sha::sha1m<Arch>(__builtin_bit_cast(uint32x4_t, abcd.to_native()), e, __builtin_bit_cast(uint32x4_t, wk.to_native()));
72 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha1) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
74 return detail::arm_constant::sha1_rounds<2>(abcd, e, wk);
78 template<isa<arm> Arch=NATIVE_BA
SELINE>
requires(Arch.has(arm_feature::sha1))
81 if consteval {
return (a>>2)|(a<<30); }
82 else {
return detail::arm_sha::sha1h<Arch>(a); }
86 template<isa<arm> Arch=NATIVE_BA
SELINE>
requires(!Arch.has(arm_feature::sha1))
88 return (a>>2)|(a<<30);
92 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha1))
94 constexpr simd<std::uint32_t, 4, Arch> sha1su0(
simd<std::uint32_t, 4, Arch> w0_3,
simd<std::uint32_t, 4, Arch> w4_7,
simd<std::uint32_t, 4, Arch> w8_11)
noexcept {
95 if consteval {
return detail::arm_constant::sha1su0(w0_3, w4_7, w8_11); }
97 auto result = detail::arm_sha::sha1su0<Arch>(__builtin_bit_cast(uint32x4_t, w0_3.to_native()), __builtin_bit_cast(uint32x4_t, w4_7.to_native()), __builtin_bit_cast(uint32x4_t, w8_11.to_native()));
103 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha1) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
104 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha1su0(
simd<std::uint32_t, 4, Arch> w0_3,
simd<std::uint32_t, 4, Arch> w4_7,
simd<std::uint32_t, 4, Arch> w8_11)
noexcept {
105 return detail::arm_constant::sha1su0(w0_3, w4_7, w8_11);
109 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha1))
112 if consteval {
return detail::arm_constant::sha1su1(partial, w12_15); }
114 auto result = detail::arm_sha::sha1su1<Arch>(__builtin_bit_cast(uint32x4_t, partial.to_native()), __builtin_bit_cast(uint32x4_t, w12_15.to_native()));
120 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha1) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
122 return detail::arm_constant::sha1su1(partial, w12_15);
126 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha2))
128 constexpr
simd<
std::uint32_t, 4, Arch>
sha256h(
simd<
std::uint32_t, 4, Arch> abcd,
simd<
std::uint32_t, 4, Arch> efgh,
simd<
std::uint32_t, 4, Arch> wk) noexcept {
129 if consteval {
return detail::arm_constant::sha256_rounds<false>(abcd, efgh, wk); }
131 auto result = detail::arm_sha::sha256h<Arch>(__builtin_bit_cast(uint32x4_t, abcd.to_native()), __builtin_bit_cast(uint32x4_t, efgh.to_native()), __builtin_bit_cast(uint32x4_t, wk.to_native()));
137 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha2) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
138 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha256h(
simd<std::uint32_t, 4, Arch> abcd,
simd<std::uint32_t, 4, Arch> efgh,
simd<std::uint32_t, 4, Arch> wk)
noexcept {
139 return detail::arm_constant::sha256_rounds<false>(abcd, efgh, wk);
143 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha2))
145 constexpr
simd<
std::uint32_t, 4, Arch>
sha256h2(
simd<
std::uint32_t, 4, Arch> efgh,
simd<
std::uint32_t, 4, Arch> abcd,
simd<
std::uint32_t, 4, Arch> wk) noexcept {
146 if consteval {
return detail::arm_constant::sha256_rounds<true>(efgh, abcd, wk); }
148 auto result = detail::arm_sha::sha256h2<Arch>(__builtin_bit_cast(uint32x4_t, efgh.to_native()), __builtin_bit_cast(uint32x4_t, abcd.to_native()), __builtin_bit_cast(uint32x4_t, wk.to_native()));
154 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha2) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
155 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha256h2(
simd<std::uint32_t, 4, Arch> efgh,
simd<std::uint32_t, 4, Arch> abcd,
simd<std::uint32_t, 4, Arch> wk)
noexcept {
156 return detail::arm_constant::sha256_rounds<true>(efgh, abcd, wk);
160 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha2))
163 if consteval {
return detail::arm_constant::sha256su0(w0_3, w4_7); }
165 auto result = detail::arm_sha::sha256su0<Arch>(__builtin_bit_cast(uint32x4_t, w0_3.to_native()), __builtin_bit_cast(uint32x4_t, w4_7.to_native()));
171 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha2) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
173 return detail::arm_constant::sha256su0(w0_3, w4_7);
177 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha2))
179 constexpr
simd<
std::uint32_t, 4, Arch>
sha256su1(
simd<
std::uint32_t, 4, Arch> partial,
simd<
std::uint32_t, 4, Arch> w8_11,
simd<
std::uint32_t, 4, Arch> w12_15) noexcept {
180 if consteval {
return detail::arm_constant::sha256su1(partial, w8_11, w12_15); }
182 auto result = detail::arm_sha::sha256su1<Arch>(__builtin_bit_cast(uint32x4_t, partial.to_native()), __builtin_bit_cast(uint32x4_t, w8_11.to_native()), __builtin_bit_cast(uint32x4_t, w12_15.to_native()));
188 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha2) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
189 native_nodiscard consteval simd<std::uint32_t, 4, Arch> sha256su1(
simd<std::uint32_t, 4, Arch> partial,
simd<std::uint32_t, 4, Arch> w8_11,
simd<std::uint32_t, 4, Arch> w12_15)
noexcept {
190 return detail::arm_constant::sha256su1(partial, w8_11, w12_15);
194 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha512))
196 constexpr
simd<
std::uint64_t, 2, Arch>
sha512h(
simd<
std::uint64_t, 2, Arch> sum,
simd<
std::uint64_t, 2, Arch> fg,
simd<
std::uint64_t, 2, Arch> de) noexcept {
197 if consteval {
return detail::arm_constant::sha512h(sum, fg, de); }
199 auto result = detail::arm_sha::sha512h<Arch>(__builtin_bit_cast(uint64x2_t, sum.to_native()), __builtin_bit_cast(uint64x2_t, fg.to_native()), __builtin_bit_cast(uint64x2_t, de.to_native()));
205 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha512) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
206 native_nodiscard consteval simd<std::uint64_t, 2, Arch> sha512h(
simd<std::uint64_t, 2, Arch> sum,
simd<std::uint64_t, 2, Arch> fg,
simd<std::uint64_t, 2, Arch> de)
noexcept {
207 return detail::arm_constant::sha512h(sum, fg, de);
211 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha512))
213 constexpr
simd<
std::uint64_t, 2, Arch>
sha512h2(
simd<
std::uint64_t, 2, Arch> sum_ab,
simd<
std::uint64_t, 2, Arch> c_,
simd<
std::uint64_t, 2, Arch> ab) noexcept {
214 if consteval {
return detail::arm_constant::sha512h2(sum_ab, c_, ab); }
216 auto result = detail::arm_sha::sha512h2<Arch>(__builtin_bit_cast(uint64x2_t, sum_ab.to_native()), __builtin_bit_cast(uint64x2_t, c_.to_native()), __builtin_bit_cast(uint64x2_t, ab.to_native()));
222 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha512) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
223 native_nodiscard consteval simd<std::uint64_t, 2, Arch> sha512h2(
simd<std::uint64_t, 2, Arch> sum_ab,
simd<std::uint64_t, 2, Arch> c_,
simd<std::uint64_t, 2, Arch> ab)
noexcept {
224 return detail::arm_constant::sha512h2(sum_ab, c_, ab);
228 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha512))
231 if consteval {
return detail::arm_constant::sha512su0(w0_1, w2_); }
233 auto result = detail::arm_sha::sha512su0<Arch>(__builtin_bit_cast(uint64x2_t, w0_1.to_native()), __builtin_bit_cast(uint64x2_t, w2_.to_native()));
239 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha512) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
241 return detail::arm_constant::sha512su0(w0_1, w2_);
245 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha512))
247 constexpr
simd<
std::uint64_t, 2, Arch>
sha512su1(
simd<
std::uint64_t, 2, Arch> partial,
simd<
std::uint64_t, 2, Arch> w14_15,
simd<
std::uint64_t, 2, Arch> w9_10) noexcept {
248 if consteval {
return detail::arm_constant::sha512su1(partial, w14_15, w9_10); }
250 auto result = detail::arm_sha::sha512su1<Arch>(__builtin_bit_cast(uint64x2_t, partial.to_native()), __builtin_bit_cast(uint64x2_t, w14_15.to_native()), __builtin_bit_cast(uint64x2_t, w9_10.to_native()));
256 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha512) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
257 native_nodiscard consteval simd<std::uint64_t, 2, Arch> sha512su1(
simd<std::uint64_t, 2, Arch> partial,
simd<std::uint64_t, 2, Arch> w14_15,
simd<std::uint64_t, 2, Arch> w9_10)
noexcept {
258 return detail::arm_constant::sha512su1(partial, w14_15, w9_10);
262 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
264 constexpr
simd<
std::uint8_t, 16, Arch>
eor3(
simd<
std::uint8_t, 16, Arch> a,
simd<
std::uint8_t, 16, Arch> b,
simd<
std::uint8_t, 16, Arch> c) noexcept {
265 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
267 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(uint8x16_t, a.to_native()), __builtin_bit_cast(uint8x16_t, b.to_native()), __builtin_bit_cast(uint8x16_t, c.to_native()));
273 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint8_t, 16, Arch>); })
274 native_nodiscard consteval simd<std::uint8_t, 16, Arch> eor3(
simd<std::uint8_t, 16, Arch> a,
simd<std::uint8_t, 16, Arch> b,
simd<std::uint8_t, 16, Arch> c)
noexcept {
275 return detail::arm_constant::logical<false>(a, b, c);
279 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
281 constexpr
simd<
std::uint16_t, 8, Arch>
eor3(
simd<
std::uint16_t, 8, Arch> a,
simd<
std::uint16_t, 8, Arch> b,
simd<
std::uint16_t, 8, Arch> c) noexcept {
282 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
284 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(uint16x8_t, a.to_native()), __builtin_bit_cast(uint16x8_t, b.to_native()), __builtin_bit_cast(uint16x8_t, c.to_native()));
290 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint16_t, 8, Arch>); })
291 native_nodiscard consteval simd<std::uint16_t, 8, Arch> eor3(
simd<std::uint16_t, 8, Arch> a,
simd<std::uint16_t, 8, Arch> b,
simd<std::uint16_t, 8, Arch> c)
noexcept {
292 return detail::arm_constant::logical<false>(a, b, c);
296 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
298 constexpr
simd<
std::uint32_t, 4, Arch>
eor3(
simd<
std::uint32_t, 4, Arch> a,
simd<
std::uint32_t, 4, Arch> b,
simd<
std::uint32_t, 4, Arch> c) noexcept {
299 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
301 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(uint32x4_t, a.to_native()), __builtin_bit_cast(uint32x4_t, b.to_native()), __builtin_bit_cast(uint32x4_t, c.to_native()));
307 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
308 native_nodiscard consteval simd<std::uint32_t, 4, Arch> eor3(
simd<std::uint32_t, 4, Arch> a,
simd<std::uint32_t, 4, Arch> b,
simd<std::uint32_t, 4, Arch> c)
noexcept {
309 return detail::arm_constant::logical<false>(a, b, c);
313 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
315 constexpr
simd<
std::uint64_t, 2, Arch>
eor3(
simd<
std::uint64_t, 2, Arch> a,
simd<
std::uint64_t, 2, Arch> b,
simd<
std::uint64_t, 2, Arch> c) noexcept {
316 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
318 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(uint64x2_t, a.to_native()), __builtin_bit_cast(uint64x2_t, b.to_native()), __builtin_bit_cast(uint64x2_t, c.to_native()));
324 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
325 native_nodiscard consteval simd<std::uint64_t, 2, Arch> eor3(
simd<std::uint64_t, 2, Arch> a,
simd<std::uint64_t, 2, Arch> b,
simd<std::uint64_t, 2, Arch> c)
noexcept {
326 return detail::arm_constant::logical<false>(a, b, c);
330 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
332 constexpr
simd<
std::int8_t, 16, Arch>
eor3(
simd<
std::int8_t, 16, Arch> a,
simd<
std::int8_t, 16, Arch> b,
simd<
std::int8_t, 16, Arch> c) noexcept {
333 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
335 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(int8x16_t, a.to_native()), __builtin_bit_cast(int8x16_t, b.to_native()), __builtin_bit_cast(int8x16_t, c.to_native()));
341 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int8_t, 16, Arch>); })
342 native_nodiscard consteval simd<std::int8_t, 16, Arch> eor3(
simd<std::int8_t, 16, Arch> a,
simd<std::int8_t, 16, Arch> b,
simd<std::int8_t, 16, Arch> c)
noexcept {
343 return detail::arm_constant::logical<false>(a, b, c);
347 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
349 constexpr
simd<
std::int16_t, 8, Arch>
eor3(
simd<
std::int16_t, 8, Arch> a,
simd<
std::int16_t, 8, Arch> b,
simd<
std::int16_t, 8, Arch> c) noexcept {
350 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
352 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(int16x8_t, a.to_native()), __builtin_bit_cast(int16x8_t, b.to_native()), __builtin_bit_cast(int16x8_t, c.to_native()));
358 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int16_t, 8, Arch>); })
359 native_nodiscard consteval simd<std::int16_t, 8, Arch> eor3(
simd<std::int16_t, 8, Arch> a,
simd<std::int16_t, 8, Arch> b,
simd<std::int16_t, 8, Arch> c)
noexcept {
360 return detail::arm_constant::logical<false>(a, b, c);
364 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
366 constexpr
simd<
std::int32_t, 4, Arch>
eor3(
simd<
std::int32_t, 4, Arch> a,
simd<
std::int32_t, 4, Arch> b,
simd<
std::int32_t, 4, Arch> c) noexcept {
367 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
369 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(int32x4_t, a.to_native()), __builtin_bit_cast(int32x4_t, b.to_native()), __builtin_bit_cast(int32x4_t, c.to_native()));
375 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int32_t, 4, Arch>); })
376 native_nodiscard consteval simd<std::int32_t, 4, Arch> eor3(
simd<std::int32_t, 4, Arch> a,
simd<std::int32_t, 4, Arch> b,
simd<std::int32_t, 4, Arch> c)
noexcept {
377 return detail::arm_constant::logical<false>(a, b, c);
381 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
383 constexpr
simd<
std::int64_t, 2, Arch>
eor3(
simd<
std::int64_t, 2, Arch> a,
simd<
std::int64_t, 2, Arch> b,
simd<
std::int64_t, 2, Arch> c) noexcept {
384 if consteval {
return detail::arm_constant::logical<false>(a, b, c); }
386 auto result = detail::arm_sha::eor3<Arch>(__builtin_bit_cast(int64x2_t, a.to_native()), __builtin_bit_cast(int64x2_t, b.to_native()), __builtin_bit_cast(int64x2_t, c.to_native()));
392 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int64_t, 2, Arch>); })
393 native_nodiscard consteval simd<std::int64_t, 2, Arch> eor3(
simd<std::int64_t, 2, Arch> a,
simd<std::int64_t, 2, Arch> b,
simd<std::int64_t, 2, Arch> c)
noexcept {
394 return detail::arm_constant::logical<false>(a, b, c);
398 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
400 constexpr
simd<
std::uint8_t, 16, Arch>
bcax(
simd<
std::uint8_t, 16, Arch> a,
simd<
std::uint8_t, 16, Arch> b,
simd<
std::uint8_t, 16, Arch> c) noexcept {
401 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
403 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(uint8x16_t, a.to_native()), __builtin_bit_cast(uint8x16_t, b.to_native()), __builtin_bit_cast(uint8x16_t, c.to_native()));
409 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint8_t, 16, Arch>); })
410 native_nodiscard consteval simd<std::uint8_t, 16, Arch> bcax(
simd<std::uint8_t, 16, Arch> a,
simd<std::uint8_t, 16, Arch> b,
simd<std::uint8_t, 16, Arch> c)
noexcept {
411 return detail::arm_constant::logical<true>(a, b, c);
415 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
417 constexpr
simd<
std::uint16_t, 8, Arch>
bcax(
simd<
std::uint16_t, 8, Arch> a,
simd<
std::uint16_t, 8, Arch> b,
simd<
std::uint16_t, 8, Arch> c) noexcept {
418 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
420 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(uint16x8_t, a.to_native()), __builtin_bit_cast(uint16x8_t, b.to_native()), __builtin_bit_cast(uint16x8_t, c.to_native()));
426 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint16_t, 8, Arch>); })
427 native_nodiscard consteval simd<std::uint16_t, 8, Arch> bcax(
simd<std::uint16_t, 8, Arch> a,
simd<std::uint16_t, 8, Arch> b,
simd<std::uint16_t, 8, Arch> c)
noexcept {
428 return detail::arm_constant::logical<true>(a, b, c);
432 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
434 constexpr
simd<
std::uint32_t, 4, Arch>
bcax(
simd<
std::uint32_t, 4, Arch> a,
simd<
std::uint32_t, 4, Arch> b,
simd<
std::uint32_t, 4, Arch> c) noexcept {
435 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
437 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(uint32x4_t, a.to_native()), __builtin_bit_cast(uint32x4_t, b.to_native()), __builtin_bit_cast(uint32x4_t, c.to_native()));
443 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint32_t, 4, Arch>); })
444 native_nodiscard consteval simd<std::uint32_t, 4, Arch> bcax(
simd<std::uint32_t, 4, Arch> a,
simd<std::uint32_t, 4, Arch> b,
simd<std::uint32_t, 4, Arch> c)
noexcept {
445 return detail::arm_constant::logical<true>(a, b, c);
449 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
451 constexpr
simd<
std::uint64_t, 2, Arch>
bcax(
simd<
std::uint64_t, 2, Arch> a,
simd<
std::uint64_t, 2, Arch> b,
simd<
std::uint64_t, 2, Arch> c) noexcept {
452 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
454 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(uint64x2_t, a.to_native()), __builtin_bit_cast(uint64x2_t, b.to_native()), __builtin_bit_cast(uint64x2_t, c.to_native()));
460 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
461 native_nodiscard consteval simd<std::uint64_t, 2, Arch> bcax(
simd<std::uint64_t, 2, Arch> a,
simd<std::uint64_t, 2, Arch> b,
simd<std::uint64_t, 2, Arch> c)
noexcept {
462 return detail::arm_constant::logical<true>(a, b, c);
466 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
468 constexpr
simd<
std::int8_t, 16, Arch>
bcax(
simd<
std::int8_t, 16, Arch> a,
simd<
std::int8_t, 16, Arch> b,
simd<
std::int8_t, 16, Arch> c) noexcept {
469 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
471 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(int8x16_t, a.to_native()), __builtin_bit_cast(int8x16_t, b.to_native()), __builtin_bit_cast(int8x16_t, c.to_native()));
477 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int8_t, 16, Arch>); })
478 native_nodiscard consteval simd<std::int8_t, 16, Arch> bcax(
simd<std::int8_t, 16, Arch> a,
simd<std::int8_t, 16, Arch> b,
simd<std::int8_t, 16, Arch> c)
noexcept {
479 return detail::arm_constant::logical<true>(a, b, c);
483 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
485 constexpr
simd<
std::int16_t, 8, Arch>
bcax(
simd<
std::int16_t, 8, Arch> a,
simd<
std::int16_t, 8, Arch> b,
simd<
std::int16_t, 8, Arch> c) noexcept {
486 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
488 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(int16x8_t, a.to_native()), __builtin_bit_cast(int16x8_t, b.to_native()), __builtin_bit_cast(int16x8_t, c.to_native()));
494 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int16_t, 8, Arch>); })
495 native_nodiscard consteval simd<std::int16_t, 8, Arch> bcax(
simd<std::int16_t, 8, Arch> a,
simd<std::int16_t, 8, Arch> b,
simd<std::int16_t, 8, Arch> c)
noexcept {
496 return detail::arm_constant::logical<true>(a, b, c);
500 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
502 constexpr
simd<
std::int32_t, 4, Arch>
bcax(
simd<
std::int32_t, 4, Arch> a,
simd<
std::int32_t, 4, Arch> b,
simd<
std::int32_t, 4, Arch> c) noexcept {
503 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
505 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(int32x4_t, a.to_native()), __builtin_bit_cast(int32x4_t, b.to_native()), __builtin_bit_cast(int32x4_t, c.to_native()));
511 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int32_t, 4, Arch>); })
512 native_nodiscard consteval simd<std::int32_t, 4, Arch> bcax(
simd<std::int32_t, 4, Arch> a,
simd<std::int32_t, 4, Arch> b,
simd<std::int32_t, 4, Arch> c)
noexcept {
513 return detail::arm_constant::logical<true>(a, b, c);
517 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
519 constexpr
simd<
std::int64_t, 2, Arch>
bcax(
simd<
std::int64_t, 2, Arch> a,
simd<
std::int64_t, 2, Arch> b,
simd<
std::int64_t, 2, Arch> c) noexcept {
520 if consteval {
return detail::arm_constant::logical<true>(a, b, c); }
522 auto result = detail::arm_sha::bcax<Arch>(__builtin_bit_cast(int64x2_t, a.to_native()), __builtin_bit_cast(int64x2_t, b.to_native()), __builtin_bit_cast(int64x2_t, c.to_native()));
528 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::int64_t, 2, Arch>); })
529 native_nodiscard consteval simd<std::int64_t, 2, Arch> bcax(
simd<std::int64_t, 2, Arch> a,
simd<std::int64_t, 2, Arch> b,
simd<std::int64_t, 2, Arch> c)
noexcept {
530 return detail::arm_constant::logical<true>(a, b, c);
534 template<isa<arm> Arch>
requires(Arch.has(arm_feature::sha3))
537 if consteval {
return detail::arm_constant::rax1(a, b); }
539 auto result = detail::arm_sha::rax1<Arch>(__builtin_bit_cast(uint64x2_t, a.to_native()), __builtin_bit_cast(uint64x2_t, b.to_native()));
545 template<isa<arm> Arch>
requires(!Arch.has(arm_feature::sha3) &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
547 return detail::arm_constant::rax1(a, b);
551 template<isa<arm> Arch,
unsigned Rotate>
requires(Arch.has(arm_feature::sha3) && Rotate < 64)
554 if consteval {
return detail::arm_constant::xar<Rotate>(a, b); }
556 auto result = detail::arm_sha::xar<Arch, Rotate>(__builtin_bit_cast(uint64x2_t, a.to_native()), __builtin_bit_cast(uint64x2_t, b.to_native()));
562 template<isa<arm> Arch,
unsigned Rotate>
requires(!Arch.has(arm_feature::sha3) && Rotate < 64 &&
requires {
sizeof(simd<std::uint64_t, 2, Arch>); })
564 return detail::arm_constant::xar<Rotate>(a, b);
569 template<isa<arm> Arch,
class... T>
void sha1c(T...) =
delete;
572 template<isa<arm> Arch,
class... T>
void sha1p(T...) =
delete;
575 template<isa<arm> Arch,
class... T>
void sha1m(T...) =
delete;
578 template<isa<arm> Arch=NATIVE_BA
SELINE,
class... T>
void sha1h(T...) =
delete;
581 template<isa<arm> Arch,
class... T>
void sha1su0(T...) =
delete;
584 template<isa<arm> Arch,
class... T>
void sha1su1(T...) =
delete;
587 template<isa<arm> Arch,
class... T>
void sha256h(T...) =
delete;
590 template<isa<arm> Arch,
class... T>
void sha256h2(T...) =
delete;
593 template<isa<arm> Arch,
class... T>
void sha256su0(T...) =
delete;
596 template<isa<arm> Arch,
class... T>
void sha256su1(T...) =
delete;
599 template<isa<arm> Arch,
class... T>
void sha512h(T...) =
delete;
602 template<isa<arm> Arch,
class... T>
void sha512h2(T...) =
delete;
605 template<isa<arm> Arch,
class... T>
void sha512su0(T...) =
delete;
608 template<isa<arm> Arch,
class... T>
void sha512su1(T...) =
delete;
611 template<isa<arm> Arch,
class... T>
void eor3(T...) =
delete;
614 template<isa<arm> Arch,
class... T>
void bcax(T...) =
delete;
617 template<isa<arm> Arch,
class... T>
void rax1(T...) =
delete;
620 template<isa<arm> Arch,
unsigned Rotate,
class... T>
void xar(T...) =
delete;
constexpr std::uint32_t sha1h(std::uint32_t a) noexcept
Rotate a SHA-1 state word right by two bits; Arch defaults to the module baseline.
constexpr simd< std::uint64_t, 2, Arch > xar(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Rotate a XOR b right by Rotate bits in each 64-bit lane; Rotate is in [0, 63].
constexpr simd< std::uint64_t, 2, Arch > rax1(simd< std::uint64_t, 2, Arch > a, simd< std::uint64_t, 2, Arch > b) noexcept
Return a XOR rotate_left(b, 1) in each 64-bit lane.
constexpr simd< std::uint32_t, 4, Arch > sha1p(simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
Perform four SHA-1 rounds using parity; wk already includes the round constants.
constexpr simd< std::uint8_t, 16, Arch > eor3(simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
Return a XOR b XOR c for every bit.
constexpr simd< std::uint32_t, 4, Arch > sha256su0(simd< std::uint32_t, 4, Arch > w0_3, simd< std::uint32_t, 4, Arch > w4_7) noexcept
Compute the first part of a four-word SHA-256 schedule update.
constexpr simd< std::uint64_t, 2, Arch > sha512h(simd< std::uint64_t, 2, Arch > sum, simd< std::uint64_t, 2, Arch > fg, simd< std::uint64_t, 2, Arch > de) noexcept
Apply SHA512H to prepared round sums and packed f,g and d,e state.
constexpr simd< std::uint64_t, 2, Arch > sha512su1(simd< std::uint64_t, 2, Arch > partial, simd< std::uint64_t, 2, Arch > w14_15, simd< std::uint64_t, 2, Arch > w9_10) noexcept
Finish the two-word SHA-512 schedule update from sha512su0.
constexpr simd< std::uint32_t, 4, Arch > sha1c(simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
Perform four SHA-1 rounds using choice; wk already includes the round constants.
constexpr simd< std::uint32_t, 4, Arch > sha256su1(simd< std::uint32_t, 4, Arch > partial, simd< std::uint32_t, 4, Arch > w8_11, simd< std::uint32_t, 4, Arch > w12_15) noexcept
Finish the four-word SHA-256 schedule update from sha256su0.
constexpr simd< std::uint32_t, 4, Arch > sha1su0(simd< std::uint32_t, 4, Arch > w0_3, simd< std::uint32_t, 4, Arch > w4_7, simd< std::uint32_t, 4, Arch > w8_11) noexcept
Compute the first part of the SHA-1 schedule update for four consecutive words.
constexpr simd< std::uint64_t, 2, Arch > sha512su0(simd< std::uint64_t, 2, Arch > w0_1, simd< std::uint64_t, 2, Arch > w2_) noexcept
Compute the first part of a two-word SHA-512 schedule update.
constexpr simd< std::uint8_t, 16, Arch > bcax(simd< std::uint8_t, 16, Arch > a, simd< std::uint8_t, 16, Arch > b, simd< std::uint8_t, 16, Arch > c) noexcept
Return a XOR (b AND NOT c) for every bit.
constexpr simd< std::uint32_t, 4, Arch > sha1su1(simd< std::uint32_t, 4, Arch > partial, simd< std::uint32_t, 4, Arch > w12_15) noexcept
Finish the four-word SHA-1 schedule update from sha1su0 and words 12 through 15.
constexpr simd< std::uint32_t, 4, Arch > sha1m(simd< std::uint32_t, 4, Arch > abcd, std::uint32_t e, simd< std::uint32_t, 4, Arch > wk) noexcept
Perform four SHA-1 rounds using majority; wk already includes the round constants.
constexpr simd< std::uint32_t, 4, Arch > sha256h(simd< std::uint32_t, 4, Arch > abcd, simd< std::uint32_t, 4, Arch > efgh, simd< std::uint32_t, 4, Arch > wk) noexcept
Return a,b,c,d after four SHA-256 rounds; wk includes round constants.
constexpr simd< std::uint32_t, 4, Arch > sha256h2(simd< std::uint32_t, 4, Arch > efgh, simd< std::uint32_t, 4, Arch > abcd, simd< std::uint32_t, 4, Arch > wk) noexcept
Return e,f,g,h after four SHA-256 rounds; abcd is the state before those rounds.
constexpr simd< std::uint64_t, 2, Arch > sha512h2(simd< std::uint64_t, 2, Arch > sum_ab, simd< std::uint64_t, 2, Arch > c_, simd< std::uint64_t, 2, Arch > ab) noexcept
Apply SHA512H2 to prepared sums, c, and the packed a,b state.
#define native_inline
inline [[always_inline]]
#define native_nodiscard
C++17 [[nodiscard]].
#define native_const
[[const]] is not const
#define native_target(x)
this indicates a required feature set for the current multiversioned function.
Architecture-tagged vectors, register packs and supporting value types. Native arithmetic follows its...
Standard-library adaptations documented here for SIMD value types.
Omitted architecture arguments use the native.simd provider's baseline.